A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters

Jia Chen; Satoshi Kurachi; Shimin Shen; Haiwen Liu; Toshihiko Yoshimasu; Yong Ju Suh

doi:10.1109/ISCIT.2005.1566845

A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters

Jia Chen^*, Satoshi Kurachi, Shimin Shen, Haiwen Liu, Toshihiko Yoshimasu, Yong Ju Suh

^*Corresponding author for this work

Graduate School of Information, Production and Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

In traditional comparators especially for flash ADCs, one serious problem is the kick back noise, which disturbs the input signal voltages and consequently might cause errors at the outputs of the ADCs. In this paper, we propose a novel CMOS latched comparator with very low kickback noise for high-speed flash ADCs. The proposed comparator separates analog preamplifier from the positive feedback digital dynamic latch so as to reduce the influence of the kickback noise. Simulation results based on a mixed signal CMOS 0.35um technology show that, this comparator can work at a maximum clock frequency of 500MHz with very reduced kickback noise compared with conventional architectures.

Original language	English
Title of host publication	ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings
Pages	250-253
Number of pages	4
DOIs	https://doi.org/10.1109/ISCIT.2005.1566845
Publication status	Published - 2005
Event	ISCIT 2005 - International Symposium on Communications and Information Technologies 2005 - Beijing, China Duration: 2005 Oct 12 → 2005 Oct 14

Publication series

Name	ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings
Volume	II

Conference

Conference	ISCIT 2005 - International Symposium on Communications and Information Technologies 2005
Country/Territory	China
City	Beijing
Period	05/10/12 → 05/10/14

Keywords

ADCs
Kickback noise
Latched comparator

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1109/ISCIT.2005.1566845

Cite this

Chen, J., Kurachi, S., Shen, S., Liu, H., Yoshimasu, T., & Suh, Y. J. (2005). A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters. In ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings (pp. 250-253). [1566845] (ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings; Vol. II). https://doi.org/10.1109/ISCIT.2005.1566845

A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters. / Chen, Jia; Kurachi, Satoshi; Shen, Shimin et al.

ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings. 2005. p. 250-253 1566845 (ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings; Vol. II).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chen, J, Kurachi, S, Shen, S, Liu, H, Yoshimasu, T & Suh, YJ 2005, A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters. in ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings., 1566845, ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings, vol. II, pp. 250-253, ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Beijing, China, 05/10/12. https://doi.org/10.1109/ISCIT.2005.1566845

Chen J, Kurachi S, Shen S, Liu H, Yoshimasu T, Suh YJ. A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters. In ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings. 2005. p. 250-253. 1566845. (ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings). doi: 10.1109/ISCIT.2005.1566845

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abstract = "In traditional comparators especially for flash ADCs, one serious problem is the kick back noise, which disturbs the input signal voltages and consequently might cause errors at the outputs of the ADCs. In this paper, we propose a novel CMOS latched comparator with very low kickback noise for high-speed flash ADCs. The proposed comparator separates analog preamplifier from the positive feedback digital dynamic latch so as to reduce the influence of the kickback noise. Simulation results based on a mixed signal CMOS 0.35um technology show that, this comparator can work at a maximum clock frequency of 500MHz with very reduced kickback noise compared with conventional architectures.",

keywords = "ADCs, Kickback noise, Latched comparator",

author = "Jia Chen and Satoshi Kurachi and Shimin Shen and Haiwen Liu and Toshihiko Yoshimasu and Suh, {Yong Ju}",

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AB - In traditional comparators especially for flash ADCs, one serious problem is the kick back noise, which disturbs the input signal voltages and consequently might cause errors at the outputs of the ADCs. In this paper, we propose a novel CMOS latched comparator with very low kickback noise for high-speed flash ADCs. The proposed comparator separates analog preamplifier from the positive feedback digital dynamic latch so as to reduce the influence of the kickback noise. Simulation results based on a mixed signal CMOS 0.35um technology show that, this comparator can work at a maximum clock frequency of 500MHz with very reduced kickback noise compared with conventional architectures.

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A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters

Abstract

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Keywords

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