A method for applying loop unrolling and software pipelining to instruction-level parallel architectures

Nobuhiro Kondo, Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa

    Research output: Contribution to journalArticle

    Abstract

    A considerable part of program execution time is consumed by loops, so that loop optimization is highly effective especially for the innermost loops of a program. Software pipelining and loop unrolling are known methods for loop optimization. Software pipelining is advantageous in that the code becomes only slightly longer. This method, however, is difficult to apply if the loop includes branching when the parallelism is limited. On the other hand, loop unrolling, while being free of such limitations, suffers from a number of drawbacks. In particular the code size grows substantially and it is difficult to determine the optimal number of body replications. In order to solve these problems, it seems important to combine software pipelining with loop unrolling so as to utilize the advantages of both techniques while paying due regard to properties of programs under consideration and to the machine resources available. This paper describes a method for applying optimal loop unrolling and effective software pipelining to achieve this goal. Program characteristics obtained by means of an extended PDG (program dependence graph) are taken into consideration as well as machine resources.

    Original languageEnglish
    Pages (from-to)62-73
    Number of pages12
    JournalSystems and Computers in Japan
    Volume29
    Issue number9
    Publication statusPublished - 1998 Aug

    Fingerprint

    Software pipelining
    Parallel architectures
    Parallel Architectures
    Resources
    Optimization
    Execution Time
    Replication
    Parallelism
    Branching

    Keywords

    • Instruction-level parallelism
    • Loop unrolling
    • Optimizing compiler
    • Software pipelining

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Information Systems
    • Theoretical Computer Science
    • Computational Theory and Mathematics

    Cite this

    A method for applying loop unrolling and software pipelining to instruction-level parallel architectures. / Kondo, Nobuhiro; Koseki, Akira; Komatsu, Hideaki; Fukazawa, Yoshiaki.

    In: Systems and Computers in Japan, Vol. 29, No. 9, 08.1998, p. 62-73.

    Research output: Contribution to journalArticle

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