A method of "chemical flip-chip bonding" without loading and heating for ultra-fine chip-to-substrate interconnects

Tokihiko Yokoshima, Yasuhiro Yamaji, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A method of chemical flip-chip bonding by electroless deposition process was proposed. This method positively utilizes preferential bridge deposition between metal pads in electroless Ni-B deposition and enables bump-less interconnect without loading and/or heating at lower temperature (60°C). Details of the deposition behavior for interconnection were investigated using fundamental test chips. The selection not only of various dimensions of pad design and pad-to-pad configurations but also of materials of base materials, was very important to achieve preferential bridge connection. Preferential bridge connections show high electric resistance because of using high resistivity materials with thin thickness. In the investigation of chip-to-substrate bonding, the low resistance interconnection could be achieved with combination usage of preferential bridge deposition and conventional electroless Au deposition from non-cyanide bath. The electric resistance of the interconnection decreased to less than one-20th, dramatically.

Original languageEnglish
Title of host publicationProceedings - Electronic Components and Technology Conference
Pages80-86
Number of pages7
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA
Duration: 2009 May 262009 May 29

Other

Other2009 59th Electronic Components and Technology Conference, ECTC 2009
CitySan Diego, CA
Period09/5/2609/5/29

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Yokoshima, T., Yamaji, Y., Kikuchi, K., Nakagawa, H., & Aoyagi, M. (2009). A method of "chemical flip-chip bonding" without loading and heating for ultra-fine chip-to-substrate interconnects. In Proceedings - Electronic Components and Technology Conference (pp. 80-86). [5074000] https://doi.org/10.1109/ECTC.2009.5074000