A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding

Yasuhiro Yamaji, Tokihiko Yokoshima, Noboru Igawa, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

A chemical flip-chip bonding method by electroless plating process has been developed. This method positively utilizes so-called "bridge" phenomenon between metal pads in electroless Ni-B plating, and enables bump-less interconnect without loading and/or heating at lower temperature (60°C). The interconnect behavior was examined using test chips and substrates with various pad-to-pad configurations. The result confirmed that effective pad width and a ratio of pad pitch to pad width determine the completeness of the interconnection under the condition that distance between facing pads are sufficiently close. A potential of improved method was also demonstrated for fabricating finer pitch flip-chip interconnect with a minimum pad-pitch of 20 μm.

Original languageEnglish
Title of host publication10th Electronics Packaging Technology Conference, EPTC 2008
Pages657-662
Number of pages6
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event10th Electronics Packaging Technology Conference, EPTC 2008 - Singapore
Duration: 2008 Dec 92008 Dec 12

Other

Other10th Electronics Packaging Technology Conference, EPTC 2008
CitySingapore
Period08/12/908/12/12

Fingerprint

Electroless plating
Plating
Heating
Substrates
Metals
Temperature

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Yamaji, Y., Yokoshima, T., Igawa, N., Kikuchi, K., Nakagawa, H., & Aoyagi, M. (2008). A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding. In 10th Electronics Packaging Technology Conference, EPTC 2008 (pp. 657-662). [4763508] https://doi.org/10.1109/EPTC.2008.4763508

A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding. / Yamaji, Yasuhiro; Yokoshima, Tokihiko; Igawa, Noboru; Kikuchi, Katsuya; Nakagawa, Hiroshi; Aoyagi, Masahiro.

10th Electronics Packaging Technology Conference, EPTC 2008. 2008. p. 657-662 4763508.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamaji, Y, Yokoshima, T, Igawa, N, Kikuchi, K, Nakagawa, H & Aoyagi, M 2008, A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding. in 10th Electronics Packaging Technology Conference, EPTC 2008., 4763508, pp. 657-662, 10th Electronics Packaging Technology Conference, EPTC 2008, Singapore, 08/12/9. https://doi.org/10.1109/EPTC.2008.4763508
Yamaji Y, Yokoshima T, Igawa N, Kikuchi K, Nakagawa H, Aoyagi M. A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding. In 10th Electronics Packaging Technology Conference, EPTC 2008. 2008. p. 657-662. 4763508 https://doi.org/10.1109/EPTC.2008.4763508
Yamaji, Yasuhiro ; Yokoshima, Tokihiko ; Igawa, Noboru ; Kikuchi, Katsuya ; Nakagawa, Hiroshi ; Aoyagi, Masahiro. / A method of fabricating bump-less interconnects applicable to wafer-scale flip-chip bonding. 10th Electronics Packaging Technology Conference, EPTC 2008. 2008. pp. 657-662
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