A new high-speed low-voltage charge pump for PLL applications

Hong Yu*, Yasuaki Inoue, Yan Han

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)

    Abstract

    The various non-ideal phenomena in the charge pump circuits are discussed in this paper. The relevant effects and solutions are also presented. Based on the above analysis, we propose a new simple charge pump circuit, which is suitable for high speed PLL circuits and can work at a low supply. The charge pump is designed in a standard CMOS 0.18μm technology. The SPECTRE simulation results show the capability of high-frequency operation (1GHz) with very low-power consumption (28μW) at the 1V power supply. Moreover, the output waveform does not exhibit spurious jumps.

    Original languageEnglish
    Title of host publicationASICON 2005: 2005 6th International Conference on ASIC, Proceedings
    Pages435-438
    Number of pages4
    Volume1
    Publication statusPublished - 2005
    EventASICON 2005: 2005 6th International Conference on ASIC - Shanghai
    Duration: 2005 Oct 242005 Oct 27

    Other

    OtherASICON 2005: 2005 6th International Conference on ASIC
    CityShanghai
    Period05/10/2405/10/27

    ASJC Scopus subject areas

    • Engineering(all)

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