A New MOS Integrated Circuit Fabrication Using Si3N4 Film Self-Alignment Liftoff Techniques

Toshiaki Yachi, Noriyoshi Yamauchi

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A new MOS integrated circuits fabrication process that realizes self-aligned source and drain contact hole formation is described. This process utilizes a Si3N4 film self-alignment liftoff technique for selective oxidation (SALTS). Devices are fabricated using SALTS. It is shown that device packing density and speed show a 30-percent or more improvement over the conventional method at the same minimum lithographic feature size. It is also shown that Si3N4 film deposited using the sputtering method does not cause any degradation in device characteristics.

Original languageEnglish
Pages (from-to)243-247
Number of pages5
JournalIEEE Transactions on Electron Devices
Volume29
Issue number2
DOIs
Publication statusPublished - 1982 Feb
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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