A novel floorplan representation with random contour corner selecting scheme

Xiaohao Gao, Takeshi Yoshimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Floorplanning has played a crucial role in the VLSI physical design process, while a lot of focus has been put on the representation methodologies for the floorplan optimization in the recent researches. In this work, we propose an efficient P-admissible representation, called random contour corner (RCC), for non-slicing floorplans. It depends on a two-section random code, representing the sequence and location of the blocks respectively. The objective is to improve both area and wire length. For the optimization procedure, we apply a simulated annealing (SA) algorithm. The method is quite simple and time efficient for implementation even on large-scale integration floorplans, and the run time complexity for the algorithm is O(nlogn). The experimental results show that our proposed method achieves promising results by comparing with some other representations (O-tree, B*-tree and TCG) on basic MCNC benchmark circuits.

Original languageEnglish
Title of host publicationIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings
Pages552-556
Number of pages5
DOIs
Publication statusPublished - 2013
Event2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013 - Sydney, NSW
Duration: 2013 Apr 172013 Apr 19

Other

Other2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013
CitySydney, NSW
Period13/4/1713/4/19

Keywords

  • Floorplan
  • layout
  • representation
  • VLSI

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Gao, X., & Yoshimura, T. (2013). A novel floorplan representation with random contour corner selecting scheme. In IEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings (pp. 552-556). [6584506] https://doi.org/10.1109/TENCONSpring.2013.6584506