A novel hardware method to implement a routing algorithm onto network on chip

Yiping Dong, Hua Zhang, Zhen Lin, Takahiro Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recently, a Network on Chip (NoC) has attracted much attention for its smart structure and high performance. However, NoC routing algorithms significantly influences the performance and design cost. In this paper, a new hardware method to implement a routing algorithm is proposed. The proposed method is used to replace the general destination-tag method for router design. We simulate and evaluate the router and NoC with proposed method in terms of circuit resource, latency and throughput. The results indicate that the NoC architecture with proposed method is effective in reducing circuit resource, latency and increasing throughput.

Original languageEnglish
Title of host publication2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings
Pages852-856
Number of pages5
DOIs
Publication statusPublished - 2010
Event2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Chengdu
Duration: 2010 Jul 282010 Jul 30

Other

Other2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010
CityChengdu
Period10/7/2810/7/30

Fingerprint

Routing algorithms
Hardware
Routers
Throughput
Intelligent structures
Networks (circuits)
Network-on-chip
Costs

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Dong, Y., Zhang, H., Lin, Z., & Watanabe, T. (2010). A novel hardware method to implement a routing algorithm onto network on chip. In 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings (pp. 852-856). [5581857] https://doi.org/10.1109/ICCCAS.2010.5581857

A novel hardware method to implement a routing algorithm onto network on chip. / Dong, Yiping; Zhang, Hua; Lin, Zhen; Watanabe, Takahiro.

2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings. 2010. p. 852-856 5581857.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dong, Y, Zhang, H, Lin, Z & Watanabe, T 2010, A novel hardware method to implement a routing algorithm onto network on chip. in 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings., 5581857, pp. 852-856, 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010, Chengdu, 10/7/28. https://doi.org/10.1109/ICCCAS.2010.5581857
Dong Y, Zhang H, Lin Z, Watanabe T. A novel hardware method to implement a routing algorithm onto network on chip. In 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings. 2010. p. 852-856. 5581857 https://doi.org/10.1109/ICCCAS.2010.5581857
Dong, Yiping ; Zhang, Hua ; Lin, Zhen ; Watanabe, Takahiro. / A novel hardware method to implement a routing algorithm onto network on chip. 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings. 2010. pp. 852-856
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