Abstract
A new type of silicon-based Tunneling FET (TFET) using semiconducting silicide Mg2Si/Si hetero-junction as source-channel structure is proposed and the device simulation has been presented. With narrow bandgap of silicide and the conduction and valence band discontinuous at the hetero-junction, larger drain current and smaller subthreshold swing than those of Si homo-junction TFET can be obtained. Structural optimization study reveals that low Si channel impurity concentration and the alignment of the gate electrode edge to the hetero-junction lead to better performance of the TFET. Scaling of the gate length increases the off-state leakage current, however, the drain voltage (Vd) reduction in accordance with the gate scaling suppresses the phenomenon, keeping its high drivability.
| Original language | English |
|---|---|
| Pages (from-to) | 899-904 |
| Number of pages | 6 |
| Journal | Microelectronics Reliability |
| Volume | 54 |
| Issue number | 5 |
| DOIs | |
| Publication status | Published - 2014 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
- Surfaces, Coatings and Films
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Safety, Risk, Reliability and Quality
Cite this
A novel hetero-junction Tunnel-FET using Semiconducting silicide-Silicon contact and its scalability. / Wu, Yan; Hasegawa, Hiroyuki; Kakushima, Kuniyuki; Ohmori, Kenji; Watanabe, Takanobu; Nishiyama, Akira; Sugii, Nobuyuki; Wakabayashi, Hitoshi; Tsutsui, Kazuo; Kataoka, Yoshinori; Natori, Kenji; Yamada, Keisaku; Iwai, Hiroshi.
In: Microelectronics Reliability, Vol. 54, No. 5, 2014, p. 899-904.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - A novel hetero-junction Tunnel-FET using Semiconducting silicide-Silicon contact and its scalability
AU - Wu, Yan
AU - Hasegawa, Hiroyuki
AU - Kakushima, Kuniyuki
AU - Ohmori, Kenji
AU - Watanabe, Takanobu
AU - Nishiyama, Akira
AU - Sugii, Nobuyuki
AU - Wakabayashi, Hitoshi
AU - Tsutsui, Kazuo
AU - Kataoka, Yoshinori
AU - Natori, Kenji
AU - Yamada, Keisaku
AU - Iwai, Hiroshi
PY - 2014
Y1 - 2014
N2 - A new type of silicon-based Tunneling FET (TFET) using semiconducting silicide Mg2Si/Si hetero-junction as source-channel structure is proposed and the device simulation has been presented. With narrow bandgap of silicide and the conduction and valence band discontinuous at the hetero-junction, larger drain current and smaller subthreshold swing than those of Si homo-junction TFET can be obtained. Structural optimization study reveals that low Si channel impurity concentration and the alignment of the gate electrode edge to the hetero-junction lead to better performance of the TFET. Scaling of the gate length increases the off-state leakage current, however, the drain voltage (Vd) reduction in accordance with the gate scaling suppresses the phenomenon, keeping its high drivability.
AB - A new type of silicon-based Tunneling FET (TFET) using semiconducting silicide Mg2Si/Si hetero-junction as source-channel structure is proposed and the device simulation has been presented. With narrow bandgap of silicide and the conduction and valence band discontinuous at the hetero-junction, larger drain current and smaller subthreshold swing than those of Si homo-junction TFET can be obtained. Structural optimization study reveals that low Si channel impurity concentration and the alignment of the gate electrode edge to the hetero-junction lead to better performance of the TFET. Scaling of the gate length increases the off-state leakage current, however, the drain voltage (Vd) reduction in accordance with the gate scaling suppresses the phenomenon, keeping its high drivability.
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U2 - 10.1016/j.microrel.2014.01.023
DO - 10.1016/j.microrel.2014.01.023
M3 - Article
VL - 54
SP - 899
EP - 904
JO - Microelectronics and Reliability
JF - Microelectronics and Reliability
SN - 0026-2714
IS - 5
ER -