A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching

Takashi Tanii, Satoru Fujita, Yoshiteru Numao, Iwao Matsuya, Mitsuaki Sakairi, Meishoku Masahara, Iwao Ohdomari

    Research output: Contribution to journalArticle

    2 Citations (Scopus)

    Abstract

    A novel process for the fabrication of a gated silicon field emitter array is proposed. The process involves complete self-alignment of gate electrodes taking advantage of ion bombardment retarded etching. The ion-irradiated regions serve as masks for subsequent silicon etching resulting in the formation of tabletop structures. The structures are suitable for both the formation of pyramidal emitters and the arrangement of gate electrodes adjacent to each emitter. We integrate this silicon etching into a self-align process for the fabrication of gated emitter array. The emission characteristics of 100 emitters are tested, and the emission at a gate voltage of 30 V is detected. The results indicate that the proposed process is applicable to the fabrication of gated silicon emitters.

    Original languageEnglish
    Pages (from-to)5191-5192
    Number of pages2
    JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
    Volume44
    Issue number7 A
    DOIs
    Publication statusPublished - 2005 Jul 8

    Fingerprint

    Ion bombardment
    bombardment
    Etching
    emitters
    etching
    Fabrication
    Silicon
    fabrication
    silicon
    ions
    Electrodes
    self alignment
    Masks
    electrodes
    Ions
    Electric potential
    masks
    electric potential

    Keywords

    • Electron beam
    • Field emission
    • IBRE
    • Ion bombardment retarded etching
    • Silicon
    • Tetramethylammonium hydroxide
    • TMAH

    ASJC Scopus subject areas

    • Physics and Astronomy (miscellaneous)

    Cite this

    A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching. / Tanii, Takashi; Fujita, Satoru; Numao, Yoshiteru; Matsuya, Iwao; Sakairi, Mitsuaki; Masahara, Meishoku; Ohdomari, Iwao.

    In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 44, No. 7 A, 08.07.2005, p. 5191-5192.

    Research output: Contribution to journalArticle

    Tanii, Takashi ; Fujita, Satoru ; Numao, Yoshiteru ; Matsuya, Iwao ; Sakairi, Mitsuaki ; Masahara, Meishoku ; Ohdomari, Iwao. / A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching. In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 2005 ; Vol. 44, No. 7 A. pp. 5191-5192.
    @article{e5c39a7ff4db4a68a12d1ec64814051c,
    title = "A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching",
    abstract = "A novel process for the fabrication of a gated silicon field emitter array is proposed. The process involves complete self-alignment of gate electrodes taking advantage of ion bombardment retarded etching. The ion-irradiated regions serve as masks for subsequent silicon etching resulting in the formation of tabletop structures. The structures are suitable for both the formation of pyramidal emitters and the arrangement of gate electrodes adjacent to each emitter. We integrate this silicon etching into a self-align process for the fabrication of gated emitter array. The emission characteristics of 100 emitters are tested, and the emission at a gate voltage of 30 V is detected. The results indicate that the proposed process is applicable to the fabrication of gated silicon emitters.",
    keywords = "Electron beam, Field emission, IBRE, Ion bombardment retarded etching, Silicon, Tetramethylammonium hydroxide, TMAH",
    author = "Takashi Tanii and Satoru Fujita and Yoshiteru Numao and Iwao Matsuya and Mitsuaki Sakairi and Meishoku Masahara and Iwao Ohdomari",
    year = "2005",
    month = "7",
    day = "8",
    doi = "10.1143/JJAP.44.5191",
    language = "English",
    volume = "44",
    pages = "5191--5192",
    journal = "Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes",
    issn = "0021-4922",
    publisher = "Japan Society of Applied Physics",
    number = "7 A",

    }

    TY - JOUR

    T1 - A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching

    AU - Tanii, Takashi

    AU - Fujita, Satoru

    AU - Numao, Yoshiteru

    AU - Matsuya, Iwao

    AU - Sakairi, Mitsuaki

    AU - Masahara, Meishoku

    AU - Ohdomari, Iwao

    PY - 2005/7/8

    Y1 - 2005/7/8

    N2 - A novel process for the fabrication of a gated silicon field emitter array is proposed. The process involves complete self-alignment of gate electrodes taking advantage of ion bombardment retarded etching. The ion-irradiated regions serve as masks for subsequent silicon etching resulting in the formation of tabletop structures. The structures are suitable for both the formation of pyramidal emitters and the arrangement of gate electrodes adjacent to each emitter. We integrate this silicon etching into a self-align process for the fabrication of gated emitter array. The emission characteristics of 100 emitters are tested, and the emission at a gate voltage of 30 V is detected. The results indicate that the proposed process is applicable to the fabrication of gated silicon emitters.

    AB - A novel process for the fabrication of a gated silicon field emitter array is proposed. The process involves complete self-alignment of gate electrodes taking advantage of ion bombardment retarded etching. The ion-irradiated regions serve as masks for subsequent silicon etching resulting in the formation of tabletop structures. The structures are suitable for both the formation of pyramidal emitters and the arrangement of gate electrodes adjacent to each emitter. We integrate this silicon etching into a self-align process for the fabrication of gated emitter array. The emission characteristics of 100 emitters are tested, and the emission at a gate voltage of 30 V is detected. The results indicate that the proposed process is applicable to the fabrication of gated silicon emitters.

    KW - Electron beam

    KW - Field emission

    KW - IBRE

    KW - Ion bombardment retarded etching

    KW - Silicon

    KW - Tetramethylammonium hydroxide

    KW - TMAH

    UR - http://www.scopus.com/inward/record.url?scp=31144457027&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=31144457027&partnerID=8YFLogxK

    U2 - 10.1143/JJAP.44.5191

    DO - 10.1143/JJAP.44.5191

    M3 - Article

    AN - SCOPUS:31144457027

    VL - 44

    SP - 5191

    EP - 5192

    JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

    JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

    SN - 0021-4922

    IS - 7 A

    ER -