Abstract
Network-on-Chip (NoC) is an attractive solution for future systems on chip (SoC). The network performance depends critically on the performance of packets routing. However, as the network becomes more congested, packets will be blocked more frequently. It would result in degrading the network performance. In this article, we propose an innovative dual-switch allocation (DSA) design. By introducing two switch allocations, we can make utmost use of idle output ports. Experimental results show that our design significantly achieves the performance improvement in terms of throughput and latency at the cost of very little power overhead.
Original language | English |
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Title of host publication | 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 69-74 |
Number of pages | 6 |
ISBN (Print) | 9781479977925 |
DOIs | |
Publication status | Published - 2015 Mar 11 |
Event | 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 - Chiba, Japan Duration: 2015 Jan 19 → 2015 Jan 22 |
Other
Other | 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 |
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Country | Japan |
City | Chiba |
Period | 15/1/19 → 15/1/22 |
ASJC Scopus subject areas
- Computer Science Applications
- Electrical and Electronic Engineering
- Control and Systems Engineering
- Modelling and Simulation