A Retargetable Simulator Generator for DSP Processor Cores with Packed SIMD-type Instructions

Nozomu Togawa, Kyosuke Kasahara, Yuichiro Miyaoka, Jinku Choi, Masao Yanagisawa, Tatsuo Ohtsuki

    Research output: Contribution to journalArticle

    Abstract

    A packed SIMD type operation or a SIMD operation is n-parallel b/n-bit sub-operations executed by the modified n-bit functional unit. Such a functional unit is called a SIMD functional unit and a processor core which can execute SIMD operations is called a SIMD processor core. SIMD operations can be effectively applied to image processing applications. This paper focuses on hardware/software cosynthesis of SIMD processor cores and particularly proposes a new simulator generator which simulates pipelined instructions for a SIMD processor. Generally, a SIMD functional unit has many options and then we can have so many different SIMD functional unit instances. However, since our hardware/software cosynthesis system synthesizes a special-purpose processor core for an input application program, it uses very limited SIMD functional unit instances. In the proposed approach, we consider a SIMD operation to be a set of SIMD sub-operations. By adding up the appropriate SIMD sub-operations, we construct a single SIMD operation. Then a SIMD functional unit behavior can be characterized by a collection of SIMD operations. This approach has the advantage that: if we have a small number of behavior libraries for SIMD suboperations, we can instantiate a particular SIMD functional unit behavior. Experimental results demonstrate the effectiveness of the proposed approach.

    Original languageEnglish
    Pages (from-to)3099-3109
    Number of pages11
    JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
    VolumeE86-A
    Issue number12
    Publication statusPublished - 2003 Dec

    Fingerprint

    Simulator
    Simulators
    Generator
    Hardware
    Application programs
    Unit
    Image processing
    Software System
    Image Processing
    Software
    Experimental Results
    Demonstrate

    Keywords

    • DSP processor
    • Hardware/software cosynthesis
    • Packed SIMD type instruction
    • Processor synthesis
    • Retargetable simulator

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Hardware and Architecture
    • Information Systems

    Cite this

    A Retargetable Simulator Generator for DSP Processor Cores with Packed SIMD-type Instructions. / Togawa, Nozomu; Kasahara, Kyosuke; Miyaoka, Yuichiro; Choi, Jinku; Yanagisawa, Masao; Ohtsuki, Tatsuo.

    In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 12, 12.2003, p. 3099-3109.

    Research output: Contribution to journalArticle

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