A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology

Yuuichi Hirano, Mikio Tsujiuchi, Kozo Ishikawa, Hirofumi Shinohara, Takashi Terada, Yukio Maki, Toshiaki Iwamatsu, Katsumi Eikyu, Tetsuya Uchida, Shigeki Obayashi, Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi, Takashi Ipposhi, Hidekazu Oda, Yasuo Inoue

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is successfully realized by using a body bias of load, access, and driver transistors while suppressing threshold-voltage variations. In this technology, well taps control the body potential of the load transistor and word lines also control the body potential of the access and driver transistors. It is demonstrated that the write and read margins of 65-nm-node silicon-on-insulator (SOI) SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

Original languageEnglish
Pages (from-to)2092-2096
Number of pages5
JournalJapanese Journal of Applied Physics
Volume47
Issue number4 PART 1
DOIs
Publication statusPublished - 2008 Apr 18
Externally publishedYes

Fingerprint

Memory architecture
random access memory
insulators
margins
Silicon
Transistors
silicon
transistors
Static random access storage
Threshold voltage
countermeasures
taps
threshold voltage
emerging
Data storage equipment
augmentation

Keywords

  • Full trench isolation
  • Hybrid trench isolation
  • LSI
  • Partial trench isolation
  • SOI
  • SRAM
  • Static noise margin

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

Cite this

A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology. / Hirano, Yuuichi; Tsujiuchi, Mikio; Ishikawa, Kozo; Shinohara, Hirofumi; Terada, Takashi; Maki, Yukio; Iwamatsu, Toshiaki; Eikyu, Katsumi; Uchida, Tetsuya; Obayashi, Shigeki; Nii, Koji; Tsukamoto, Yasumasa; Yabuuchi, Makoto; Ipposhi, Takashi; Oda, Hidekazu; Inoue, Yasuo.

In: Japanese Journal of Applied Physics, Vol. 47, No. 4 PART 1, 18.04.2008, p. 2092-2096.

Research output: Contribution to journalArticle

Hirano, Y, Tsujiuchi, M, Ishikawa, K, Shinohara, H, Terada, T, Maki, Y, Iwamatsu, T, Eikyu, K, Uchida, T, Obayashi, S, Nii, K, Tsukamoto, Y, Yabuuchi, M, Ipposhi, T, Oda, H & Inoue, Y 2008, 'A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology', Japanese Journal of Applied Physics, vol. 47, no. 4 PART 1, pp. 2092-2096. https://doi.org/10.1143/JJAP.47.2092
Hirano, Yuuichi ; Tsujiuchi, Mikio ; Ishikawa, Kozo ; Shinohara, Hirofumi ; Terada, Takashi ; Maki, Yukio ; Iwamatsu, Toshiaki ; Eikyu, Katsumi ; Uchida, Tetsuya ; Obayashi, Shigeki ; Nii, Koji ; Tsukamoto, Yasumasa ; Yabuuchi, Makoto ; Ipposhi, Takashi ; Oda, Hidekazu ; Inoue, Yasuo. / A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology. In: Japanese Journal of Applied Physics. 2008 ; Vol. 47, No. 4 PART 1. pp. 2092-2096.
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