A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology

Yuuichi Hirano; Mikio Tsujiuchi; Kozo Ishikawa; Hirofumi Shinohara; Takashi Terada; Yukio Maki; Toshiaki Iwamatsu; Katsumi Eikyu; Tetsuya Uchida; Shigeki Obayashi; Koji Nii; Yasumasa Tsukamoto; Makoto Yabuuchi; Takashi Ipposhi; Hidekazu Oda; Yasuo Inoue

doi:10.1143/JJAP.47.2092

A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology

Yuuichi Hirano^*, Mikio Tsujiuchi, Kozo Ishikawa, Hirofumi Shinohara, Takashi Terada, Yukio Maki, Toshiaki Iwamatsu, Katsumi Eikyu, Tetsuya Uchida, Shigeki Obayashi, Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi, Takashi Ipposhi, Hidekazu Oda, Yasuo Inoue

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is successfully realized by using a body bias of load, access, and driver transistors while suppressing threshold-voltage variations. In this technology, well taps control the body potential of the load transistor and word lines also control the body potential of the access and driver transistors. It is demonstrated that the write and read margins of 65-nm-node silicon-on-insulator (SOI) SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

Original language	English
Pages (from-to)	2092-2096
Number of pages	5
Journal	Japanese journal of applied physics
Volume	47
Issue number	4 PART 1
DOIs	https://doi.org/10.1143/JJAP.47.2092
Publication status	Published - 2008 Apr 18
Externally published	Yes

Keywords

Full trench isolation
Hybrid trench isolation
LSI
Partial trench isolation
SOI
SRAM
Static noise margin

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

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10.1143/JJAP.47.2092

Cite this

Hirano, Y., Tsujiuchi, M., Ishikawa, K., Shinohara, H., Terada, T., Maki, Y., Iwamatsu, T., Eikyu, K., Uchida, T., Obayashi, S., Nii, K., Tsukamoto, Y., Yabuuchi, M., Ipposhi, T., Oda, H., & Inoue, Y. (2008). A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology. Japanese journal of applied physics, 47(4 PART 1), 2092-2096. https://doi.org/10.1143/JJAP.47.2092

A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology. / Hirano, Yuuichi; Tsujiuchi, Mikio; Ishikawa, Kozo; Shinohara, Hirofumi; Terada, Takashi; Maki, Yukio; Iwamatsu, Toshiaki; Eikyu, Katsumi; Uchida, Tetsuya; Obayashi, Shigeki; Nii, Koji; Tsukamoto, Yasumasa; Yabuuchi, Makoto; Ipposhi, Takashi; Oda, Hidekazu; Inoue, Yasuo.

In: Japanese journal of applied physics, Vol. 47, No. 4 PART 1, 18.04.2008, p. 2092-2096.

Research output: Contribution to journal › Article › peer-review

Hirano, Y, Tsujiuchi, M, Ishikawa, K, Shinohara, H, Terada, T, Maki, Y, Iwamatsu, T, Eikyu, K, Uchida, T, Obayashi, S, Nii, K, Tsukamoto, Y, Yabuuchi, M, Ipposhi, T, Oda, H & Inoue, Y 2008, 'A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology', Japanese journal of applied physics, vol. 47, no. 4 PART 1, pp. 2092-2096. https://doi.org/10.1143/JJAP.47.2092

Hirano, Yuuichi ; Tsujiuchi, Mikio ; Ishikawa, Kozo ; Shinohara, Hirofumi ; Terada, Takashi ; Maki, Yukio ; Iwamatsu, Toshiaki ; Eikyu, Katsumi ; Uchida, Tetsuya ; Obayashi, Shigeki ; Nii, Koji ; Tsukamoto, Yasumasa ; Yabuuchi, Makoto ; Ipposhi, Takashi ; Oda, Hidekazu ; Inoue, Yasuo. / A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology. In: Japanese journal of applied physics. 2008 ; Vol. 47, No. 4 PART 1. pp. 2092-2096.

@article{82858efa17ce4cf58484e906d897d9b0,

title = "A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology",

abstract = "This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is successfully realized by using a body bias of load, access, and driver transistors while suppressing threshold-voltage variations. In this technology, well taps control the body potential of the load transistor and word lines also control the body potential of the access and driver transistors. It is demonstrated that the write and read margins of 65-nm-node silicon-on-insulator (SOI) SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.",

keywords = "Full trench isolation, Hybrid trench isolation, LSI, Partial trench isolation, SOI, SRAM, Static noise margin",

author = "Yuuichi Hirano and Mikio Tsujiuchi and Kozo Ishikawa and Hirofumi Shinohara and Takashi Terada and Yukio Maki and Toshiaki Iwamatsu and Katsumi Eikyu and Tetsuya Uchida and Shigeki Obayashi and Koji Nii and Yasumasa Tsukamoto and Makoto Yabuuchi and Takashi Ipposhi and Hidekazu Oda and Yasuo Inoue",

year = "2008",

month = apr,

day = "18",

doi = "10.1143/JJAP.47.2092",

language = "English",

volume = "47",

pages = "2092--2096",

journal = "Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes",

issn = "0021-4922",

publisher = "Japan Society of Applied Physics",

number = "4 PART 1",

}

TY - JOUR

T1 - A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology

AU - Hirano, Yuuichi

AU - Tsujiuchi, Mikio

AU - Ishikawa, Kozo

AU - Shinohara, Hirofumi

AU - Terada, Takashi

AU - Maki, Yukio

AU - Iwamatsu, Toshiaki

AU - Eikyu, Katsumi

AU - Uchida, Tetsuya

AU - Obayashi, Shigeki

AU - Nii, Koji

AU - Tsukamoto, Yasumasa

AU - Yabuuchi, Makoto

AU - Ipposhi, Takashi

AU - Oda, Hidekazu

AU - Inoue, Yasuo

PY - 2008/4/18

Y1 - 2008/4/18

N2 - This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is successfully realized by using a body bias of load, access, and driver transistors while suppressing threshold-voltage variations. In this technology, well taps control the body potential of the load transistor and word lines also control the body potential of the access and driver transistors. It is demonstrated that the write and read margins of 65-nm-node silicon-on-insulator (SOI) SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

AB - This paper presents that advanced actively body-bias controlled (Advanced ABC) technology contributes to enhancing operation margins of static random access memory (SRAM). For the first time, significant enhancement of static noise margin (SNM) is successfully realized by using a body bias of load, access, and driver transistors while suppressing threshold-voltage variations. In this technology, well taps control the body potential of the load transistor and word lines also control the body potential of the access and driver transistors. It is demonstrated that the write and read margins of 65-nm-node silicon-on-insulator (SOI) SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

KW - Full trench isolation

KW - Hybrid trench isolation

KW - LSI

KW - Partial trench isolation

KW - SOI

KW - SRAM

KW - Static noise margin

UR - http://www.scopus.com/inward/record.url?scp=54249127860&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=54249127860&partnerID=8YFLogxK

U2 - 10.1143/JJAP.47.2092

DO - 10.1143/JJAP.47.2092

M3 - Article

AN - SCOPUS:54249127860

VL - 47

SP - 2092

EP - 2096

JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

SN - 0021-4922

IS - 4 PART 1

ER -

A robust silicon-on-insulator static-random-access-memory architecture by using advanced actively body-bias controlled technology

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Keywords

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