A sophisticated routing algorithm in 3D NoC with fixed TSVs for low energy and latency

Xin Jiang, Lian Zeng, Takahiro Watanabe

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

With rapid progress in Integrated Circuit technologies, Three-Dimensional Network-on-Chips (3DNoCs) have become a promising solution for achieving low latency and low power. Under the constraint of the TSV number used in 3DNoCs, designing a proper routing algorithm with fewer TSVs is a critical problem for network performance improvement. In this work, we design a novel fully adaptive routing algorithm in 3D NoC. The algorithm consists of two parts: one is a vertical node assignment in inter-layer routing, which is a TSV selection scheme in a limited quantity of TSVs in the NoC architecture, and the other is a 2D fully adaptive routing algorithm in intra-layer routing, which combines the optimization of routing distance, network traffic condition and diversity of the path selection. Simulation results show that our proposed routing algorithm can achieve lower latency and energy consumption compared with other traditional routing algorithms.

Original languageEnglish
Pages (from-to)101-109
Number of pages9
JournalIPSJ Transactions on System LSI Design Methodology
Volume7
DOIs
Publication statusPublished - 2014

Fingerprint

Routing algorithms
Adaptive algorithms
Network performance
Integrated circuits
Energy utilization
Network-on-chip

Keywords

  • 3D NoC
  • Fully adaptive
  • Routing algorithm

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

A sophisticated routing algorithm in 3D NoC with fixed TSVs for low energy and latency. / Jiang, Xin; Zeng, Lian; Watanabe, Takahiro.

In: IPSJ Transactions on System LSI Design Methodology, Vol. 7, 2014, p. 101-109.

Research output: Contribution to journalArticle

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