A sorting-based IO connection assignment for flip-chip designs

Ran Zhang, Xue Wei, Takahiro Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In modern VLSI designs, flip-chip package is widely used to meet the higher integration density and the larger IO counts of circuits. Recently the IO buffers are mapped onto bump balls without changing the placement using re-distribution layer (RDL) in flip-chip designs. In this research, a sorting-based IO connection assignment for flip-chip designs is proposed to reduce the total wire length. The proposed method initially assigns the IO buffers to bump balls by sorting the Manhattan Distance between them, and then takes some pair-exchanges to modify the assignment. The experimental results show that compared with another partitioning-based IO assignment method, our proposed method can reduce the wire length by 12.94% on the average, at the expense of a little time consumption.

Original languageEnglish
Title of host publicationProceedings of International Conference on ASIC
PublisherIEEE Computer Society
ISBN (Print)9781467364157
DOIs
Publication statusPublished - 2013
Event2013 IEEE 10th International Conference on ASIC, ASICON 2013 - Shenzhen
Duration: 2013 Oct 282013 Oct 31

Other

Other2013 IEEE 10th International Conference on ASIC, ASICON 2013
CityShenzhen
Period13/10/2813/10/31

Fingerprint

Sorting
Wire
Networks (circuits)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Zhang, R., Wei, X., & Watanabe, T. (2013). A sorting-based IO connection assignment for flip-chip designs. In Proceedings of International Conference on ASIC [6811927] IEEE Computer Society. https://doi.org/10.1109/ASICON.2013.6811927

A sorting-based IO connection assignment for flip-chip designs. / Zhang, Ran; Wei, Xue; Watanabe, Takahiro.

Proceedings of International Conference on ASIC. IEEE Computer Society, 2013. 6811927.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, R, Wei, X & Watanabe, T 2013, A sorting-based IO connection assignment for flip-chip designs. in Proceedings of International Conference on ASIC., 6811927, IEEE Computer Society, 2013 IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, 13/10/28. https://doi.org/10.1109/ASICON.2013.6811927
Zhang R, Wei X, Watanabe T. A sorting-based IO connection assignment for flip-chip designs. In Proceedings of International Conference on ASIC. IEEE Computer Society. 2013. 6811927 https://doi.org/10.1109/ASICON.2013.6811927
Zhang, Ran ; Wei, Xue ; Watanabe, Takahiro. / A sorting-based IO connection assignment for flip-chip designs. Proceedings of International Conference on ASIC. IEEE Computer Society, 2013.
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