Abstract
Recently, high-functioning hardware devices such as smart TVs and smart phones have been widely used in our daily lives. To keep up with the rapid advance of these high technologies, reconfigurable hardware devices such as FP-GAs (Field Programmable Gate Arrays) have been used in final products. Under the circumstances, the risks that mal-functions may be inserted into hardware devices have arisen. The malfunctions inserted into hardware devices are known as hardware Trojans. How to detect them becomes serious concern in hardware production. In this paper, we design a Trojan-infected cryptographic circuit as well as a Trojan-invalidating circuit, and implement them on an FPGA board. To begin with, we design an AES cryptographic circuit. Secondly, we insert a hardware Trojan into the AES cryptographic circuit. Finally, we design a Trojan-invalidating circuit and insert it into a suspicious Trojan net in the Trojan-infected cryptographic circuit. After that, we implement the circuits into an FPGA board. The experimental results demonstrate that the Trojan-invalidating circuit adequately deactivate the suspicious Trojan net in the Trojan-infected cryptographic circuit.
| Original language | English |
|---|---|
| Title of host publication | 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Volume | 2018-May |
| ISBN (Electronic) | 9781538648810 |
| DOIs | |
| Publication status | Published - 2018 Apr 26 |
| Event | 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, Italy Duration: 2018 May 27 → 2018 May 30 |
Other
| Other | 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 |
|---|---|
| Country | Italy |
| City | Florence |
| Period | 18/5/27 → 18/5/30 |
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Keywords
- cryptographic circuit
- FPGA
- hardware Trojan
- security
- trigger
ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation. / Hasegawa, Kento; Yanagisawa, Masao; Togawa, Nozomu.
2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Vol. 2018-May Institute of Electrical and Electronics Engineers Inc., 2018. 8351058.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation
AU - Hasegawa, Kento
AU - Yanagisawa, Masao
AU - Togawa, Nozomu
PY - 2018/4/26
Y1 - 2018/4/26
N2 - Recently, high-functioning hardware devices such as smart TVs and smart phones have been widely used in our daily lives. To keep up with the rapid advance of these high technologies, reconfigurable hardware devices such as FP-GAs (Field Programmable Gate Arrays) have been used in final products. Under the circumstances, the risks that mal-functions may be inserted into hardware devices have arisen. The malfunctions inserted into hardware devices are known as hardware Trojans. How to detect them becomes serious concern in hardware production. In this paper, we design a Trojan-infected cryptographic circuit as well as a Trojan-invalidating circuit, and implement them on an FPGA board. To begin with, we design an AES cryptographic circuit. Secondly, we insert a hardware Trojan into the AES cryptographic circuit. Finally, we design a Trojan-invalidating circuit and insert it into a suspicious Trojan net in the Trojan-infected cryptographic circuit. After that, we implement the circuits into an FPGA board. The experimental results demonstrate that the Trojan-invalidating circuit adequately deactivate the suspicious Trojan net in the Trojan-infected cryptographic circuit.
AB - Recently, high-functioning hardware devices such as smart TVs and smart phones have been widely used in our daily lives. To keep up with the rapid advance of these high technologies, reconfigurable hardware devices such as FP-GAs (Field Programmable Gate Arrays) have been used in final products. Under the circumstances, the risks that mal-functions may be inserted into hardware devices have arisen. The malfunctions inserted into hardware devices are known as hardware Trojans. How to detect them becomes serious concern in hardware production. In this paper, we design a Trojan-infected cryptographic circuit as well as a Trojan-invalidating circuit, and implement them on an FPGA board. To begin with, we design an AES cryptographic circuit. Secondly, we insert a hardware Trojan into the AES cryptographic circuit. Finally, we design a Trojan-invalidating circuit and insert it into a suspicious Trojan net in the Trojan-infected cryptographic circuit. After that, we implement the circuits into an FPGA board. The experimental results demonstrate that the Trojan-invalidating circuit adequately deactivate the suspicious Trojan net in the Trojan-infected cryptographic circuit.
KW - cryptographic circuit
KW - FPGA
KW - hardware Trojan
KW - security
KW - trigger
UR - http://www.scopus.com/inward/record.url?scp=85057092715&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85057092715&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2018.8351058
DO - 10.1109/ISCAS.2018.8351058
M3 - Conference contribution
AN - SCOPUS:85057092715
VL - 2018-May
BT - 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
ER -