Abstract
The next-generation 8K ultra-high-definition video format involves an extremely high bit rate, which imposes a high throughput requirement on the entropy decoder component of a video decoder. Context adaptive binary arithmetic coding (CABAC) is the entropy coding tool in the latest video coding standards including H.265/High Efficiency Video Coding and H.264/Advanced Video Coding. Due to critical data dependencies at the algorithm level, a CABAC decoder is difficult to be accelerated by simply leveraging parallelism and pipelining. This letter presents a new very-large-scale integration arithmetic decoder, which is the most critical bottleneck in CABAC decoding. Our design features a variable-clock-cycle-path architecture that exploits the differences in critical path delay and in probability of occurrence between various types of binary symbols (bins). The proposed design also incorporates a novel data-forwarding technique (rLPS forwarding) and a fast path-selection technique (coarse bin type decision), and is enhanced with the capability of processing additional bypass bins. As a result, its maximum throughput achieves 1010 Mbins/s in 90-nm CMOS, when decoding 0.96 bin per clock cycle at a maximum clock rate of 1053 MHz, which outperforms previous works by 19.1%.
| Original language | English |
|---|---|
| Article number | 7577726 |
| Pages (from-to) | 556-560 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems for Video Technology |
| Volume | 28 |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2018 Feb 1 |
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Keywords
- Arithmetic decoder
- context adaptive binary arithmetic coding (CABAC)
- H.265
- High Efficiency Video Coding (HEVC)
ASJC Scopus subject areas
- Media Technology
- Electrical and Electronic Engineering
Cite this
A Variable-Clock-Cycle-Path VLSI Design of Binary Arithmetic Decoder for H.265/HEVC. / Zhou, Jinjia; Zhou, Dajiang; Zhang, Shuping; Kimura, Shinji; Goto, Satoshi.
In: IEEE Transactions on Circuits and Systems for Video Technology, Vol. 28, No. 2, 7577726, 01.02.2018, p. 556-560.Research output: Contribution to journal › Article
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TY - JOUR
T1 - A Variable-Clock-Cycle-Path VLSI Design of Binary Arithmetic Decoder for H.265/HEVC
AU - Zhou, Jinjia
AU - Zhou, Dajiang
AU - Zhang, Shuping
AU - Kimura, Shinji
AU - Goto, Satoshi
PY - 2018/2/1
Y1 - 2018/2/1
N2 - The next-generation 8K ultra-high-definition video format involves an extremely high bit rate, which imposes a high throughput requirement on the entropy decoder component of a video decoder. Context adaptive binary arithmetic coding (CABAC) is the entropy coding tool in the latest video coding standards including H.265/High Efficiency Video Coding and H.264/Advanced Video Coding. Due to critical data dependencies at the algorithm level, a CABAC decoder is difficult to be accelerated by simply leveraging parallelism and pipelining. This letter presents a new very-large-scale integration arithmetic decoder, which is the most critical bottleneck in CABAC decoding. Our design features a variable-clock-cycle-path architecture that exploits the differences in critical path delay and in probability of occurrence between various types of binary symbols (bins). The proposed design also incorporates a novel data-forwarding technique (rLPS forwarding) and a fast path-selection technique (coarse bin type decision), and is enhanced with the capability of processing additional bypass bins. As a result, its maximum throughput achieves 1010 Mbins/s in 90-nm CMOS, when decoding 0.96 bin per clock cycle at a maximum clock rate of 1053 MHz, which outperforms previous works by 19.1%.
AB - The next-generation 8K ultra-high-definition video format involves an extremely high bit rate, which imposes a high throughput requirement on the entropy decoder component of a video decoder. Context adaptive binary arithmetic coding (CABAC) is the entropy coding tool in the latest video coding standards including H.265/High Efficiency Video Coding and H.264/Advanced Video Coding. Due to critical data dependencies at the algorithm level, a CABAC decoder is difficult to be accelerated by simply leveraging parallelism and pipelining. This letter presents a new very-large-scale integration arithmetic decoder, which is the most critical bottleneck in CABAC decoding. Our design features a variable-clock-cycle-path architecture that exploits the differences in critical path delay and in probability of occurrence between various types of binary symbols (bins). The proposed design also incorporates a novel data-forwarding technique (rLPS forwarding) and a fast path-selection technique (coarse bin type decision), and is enhanced with the capability of processing additional bypass bins. As a result, its maximum throughput achieves 1010 Mbins/s in 90-nm CMOS, when decoding 0.96 bin per clock cycle at a maximum clock rate of 1053 MHz, which outperforms previous works by 19.1%.
KW - Arithmetic decoder
KW - context adaptive binary arithmetic coding (CABAC)
KW - H.265
KW - High Efficiency Video Coding (HEVC)
UR - http://www.scopus.com/inward/record.url?scp=85041966574&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85041966574&partnerID=8YFLogxK
U2 - 10.1109/TCSVT.2016.2614124
DO - 10.1109/TCSVT.2016.2614124
M3 - Article
AN - SCOPUS:85041966574
VL - 28
SP - 556
EP - 560
JO - IEEE Transactions on Circuits and Systems for Video Technology
JF - IEEE Transactions on Circuits and Systems for Video Technology
SN - 1051-8215
IS - 2
M1 - 7577726
ER -