A write-reducing and error-correcting code generation method for non-volatile memories

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Data stored in non-volatile memories may be destructed due to crosstalk and radiation but we can restore their data by using error-correcting codes. However, non-volatile memories consume a large amount of energy in writing. How to reduce writing bits even using error-correcting codes is one of the challenges in non-volatile memory design. In this paper, we propose a new write-reducing and error-correcting code, called Doughnut code. Doughnut code is based on state encoding limiting maximum and minimum Hamming distances. After that, we propose a code expansion method, which improves minimum and maximum Hamming distances by expanding a write-reducing code. When we apply our code expansion method to Doughnut code, we can obtain a write-reducing code whose error-correcting ability is equal to Hamming code. Experimental results show that the proposed write-reducing code reduces the number of writing bits by up to 36% compared to Hamming code.

Original languageEnglish
Title of host publication2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages304-307
Number of pages4
EditionFebruary
ISBN (Electronic)9781479952304
DOIs
Publication statusPublished - 2015 Feb 5
Event2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan
Duration: 2014 Nov 172014 Nov 20

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
NumberFebruary
Volume2015-February

Other

Other2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
CountryJapan
CityIshigaki Island, Okinawa
Period14/11/1714/11/20

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Kojo, T., Tawada, M., Yanagisawa, M., & Togawa, N. (2015). A write-reducing and error-correcting code generation method for non-volatile memories. In 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 (February ed., pp. 304-307). [7032780] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; Vol. 2015-February, No. February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2014.7032780