Abstract
The advantage of forming a retrograde well using a high-energy parallel beam has been experimentally clarified for the first time. A conventional batch-type implanter requires tilted implantation to suppress the spatial variation in a wafer. Tilted implantation, however, imposes a limit on inter-well isolation, since it deteriorates the punchthrough resistance between the source-drain diffusion and the well, and causes variation in the threshold voltage for metal-oxide-semiconductor field-effect transistors (MOSFETs) around the well boundary. A parallel beam produced by a single-wafer implanter is found to give quite a uniform doping profile even for 0°-normal implantation. Small tilt angle implantation using a high-energy parallel beam improves inter-well isolation by ∼ 0.16 μm compared with the conventional 7°-tilted implantation, which yields a ∼ 15% reduction in the static random access memory (SRAM) cell size. This advanced retrograde well technology is indispensable for inter-well isolation of a 90-nm-node embedded SRAM with a sub-1-μm2 cell.
Original language | English |
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Pages (from-to) | 2399-2403 |
Number of pages | 5 |
Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
Volume | 41 |
Issue number | 4 B |
DOIs | |
Publication status | Published - 2002 Apr 1 |
Externally published | Yes |
Keywords
- High-energy ion implantation
- Parallel beam
- Retrograde well
- Silicon
- System on a chip
ASJC Scopus subject areas
- Engineering(all)
- Physics and Astronomy(all)