An 80-106 GHz CMOS amplifier with 0.5V supply voltage

Kosuke Katayama, S. Amakawa, K. Takano, T. Yoshida, M. Fujishima, K. Hisamitsu, H. Takatsuka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-fmax transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.

Original languageEnglish
Title of host publicationRFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages308-311
Number of pages4
ISBN (Electronic)9781509046263
DOIs
Publication statusPublished - 2017 Jul 5
Externally publishedYes
Event2017 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2017 - Honolulu, United States
Duration: 2017 Jun 42017 Jun 6

Other

Other2017 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2017
CountryUnited States
CityHonolulu
Period17/6/417/6/6

Fingerprint

Feedback
Electric potential
Transistors
Electric power utilization
Capacitors
Capacitance
Semiconductor materials

Keywords

  • Feedback
  • gain-boosting
  • millimeter-wave

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Katayama, K., Amakawa, S., Takano, K., Yoshida, T., Fujishima, M., Hisamitsu, K., & Takatsuka, H. (2017). An 80-106 GHz CMOS amplifier with 0.5V supply voltage. In RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium (pp. 308-311). [7969079] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIC.2017.7969079

An 80-106 GHz CMOS amplifier with 0.5V supply voltage. / Katayama, Kosuke; Amakawa, S.; Takano, K.; Yoshida, T.; Fujishima, M.; Hisamitsu, K.; Takatsuka, H.

RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc., 2017. p. 308-311 7969079.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Katayama, K, Amakawa, S, Takano, K, Yoshida, T, Fujishima, M, Hisamitsu, K & Takatsuka, H 2017, An 80-106 GHz CMOS amplifier with 0.5V supply voltage. in RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium., 7969079, Institute of Electrical and Electronics Engineers Inc., pp. 308-311, 2017 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2017, Honolulu, United States, 17/6/4. https://doi.org/10.1109/RFIC.2017.7969079
Katayama K, Amakawa S, Takano K, Yoshida T, Fujishima M, Hisamitsu K et al. An 80-106 GHz CMOS amplifier with 0.5V supply voltage. In RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc. 2017. p. 308-311. 7969079 https://doi.org/10.1109/RFIC.2017.7969079
Katayama, Kosuke ; Amakawa, S. ; Takano, K. ; Yoshida, T. ; Fujishima, M. ; Hisamitsu, K. ; Takatsuka, H. / An 80-106 GHz CMOS amplifier with 0.5V supply voltage. RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 308-311
@inproceedings{5b6885f9cdb94cbd9515a99e49fce191,
title = "An 80-106 GHz CMOS amplifier with 0.5V supply voltage",
abstract = "A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-fmax transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.",
keywords = "Feedback, gain-boosting, millimeter-wave",
author = "Kosuke Katayama and S. Amakawa and K. Takano and T. Yoshida and M. Fujishima and K. Hisamitsu and H. Takatsuka",
year = "2017",
month = "7",
day = "5",
doi = "10.1109/RFIC.2017.7969079",
language = "English",
pages = "308--311",
booktitle = "RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",

}

TY - GEN

T1 - An 80-106 GHz CMOS amplifier with 0.5V supply voltage

AU - Katayama, Kosuke

AU - Amakawa, S.

AU - Takano, K.

AU - Yoshida, T.

AU - Fujishima, M.

AU - Hisamitsu, K.

AU - Takatsuka, H.

PY - 2017/7/5

Y1 - 2017/7/5

N2 - A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-fmax transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.

AB - A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-fmax transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.

KW - Feedback

KW - gain-boosting

KW - millimeter-wave

UR - http://www.scopus.com/inward/record.url?scp=85026882593&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85026882593&partnerID=8YFLogxK

U2 - 10.1109/RFIC.2017.7969079

DO - 10.1109/RFIC.2017.7969079

M3 - Conference contribution

AN - SCOPUS:85026882593

SP - 308

EP - 311

BT - RFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium

PB - Institute of Electrical and Electronics Engineers Inc.

ER -