Abstract
In deep submicron designs, predicting gate delays is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept is usually used to calculate the gate delay of interconnect load. Conventionally, the input-signal is assumed as ramp waveform. However, the input waveform is also the output of CMOS gates with interconnect wires. Thus the simple assumption as a ramp signal results in significant influence on the delay calculating. In this paper, an advanced effective capacitance model is proposed to consider both the input waveform effect and interconnect wire load, where the nonlinear influence of input waveform is modeled as one part of effective capacitance of capacitive load to compute the gate delay. Experimental results show a significant improvement in accuracy when the input waveform effect is considered.
| Original language | English |
|---|---|
| Title of host publication | 2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008 |
| Pages | 1088-1092 |
| Number of pages | 5 |
| DOIs | |
| Publication status | Published - 2008 |
| Event | 2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008 - Xiamen, Fujian Province Duration: 2008 May 25 → 2008 May 27 |
Other
| Other | 2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008 |
|---|---|
| City | Xiamen, Fujian Province |
| Period | 08/5/25 → 08/5/27 |
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ASJC Scopus subject areas
- Computer Networks and Communications
- Hardware and Architecture
- Control and Systems Engineering
- Electrical and Electronic Engineering
Cite this
An advanced model for calculating the effective capacitance considering input waveform effect. / Jiang, Minglu; Huang, Zhangcai; Kurokawa, Atsushi; Inoue, Yasuaki.
2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008. 2008. p. 1088-1092 4657957.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - An advanced model for calculating the effective capacitance considering input waveform effect
AU - Jiang, Minglu
AU - Huang, Zhangcai
AU - Kurokawa, Atsushi
AU - Inoue, Yasuaki
PY - 2008
Y1 - 2008
N2 - In deep submicron designs, predicting gate delays is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept is usually used to calculate the gate delay of interconnect load. Conventionally, the input-signal is assumed as ramp waveform. However, the input waveform is also the output of CMOS gates with interconnect wires. Thus the simple assumption as a ramp signal results in significant influence on the delay calculating. In this paper, an advanced effective capacitance model is proposed to consider both the input waveform effect and interconnect wire load, where the nonlinear influence of input waveform is modeled as one part of effective capacitance of capacitive load to compute the gate delay. Experimental results show a significant improvement in accuracy when the input waveform effect is considered.
AB - In deep submicron designs, predicting gate delays is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept is usually used to calculate the gate delay of interconnect load. Conventionally, the input-signal is assumed as ramp waveform. However, the input waveform is also the output of CMOS gates with interconnect wires. Thus the simple assumption as a ramp signal results in significant influence on the delay calculating. In this paper, an advanced effective capacitance model is proposed to consider both the input waveform effect and interconnect wire load, where the nonlinear influence of input waveform is modeled as one part of effective capacitance of capacitive load to compute the gate delay. Experimental results show a significant improvement in accuracy when the input waveform effect is considered.
UR - http://www.scopus.com/inward/record.url?scp=58149171442&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=58149171442&partnerID=8YFLogxK
U2 - 10.1109/ICCCAS.2008.4657957
DO - 10.1109/ICCCAS.2008.4657957
M3 - Conference contribution
AN - SCOPUS:58149171442
SN - 9781424420636
SP - 1088
EP - 1092
BT - 2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008
ER -