An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)

    Abstract

    As process technologies advance, the importance of timing error correction techniques is increasing as well. In this paper, We propose an area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction circuits (STEPCs). STEPC predicts timing errors by monitoring the middle points of several speed-paths in a circuit. However, we need many STEPCs with a high area overhead to predict timing errors in an overall circuit. Our proposed method moves the STEPC insertion positions to minimize the number of inserted STEPCs. We apply a max-flow and min-cut approach to determine the optimal positions of inserted STEPCs. Our proposed algorithm reduces the required number of STEPCs to 1/19 and their area to 1/5 compared with a naive algorithm. Furthermore, our algorithm realizes 2.25X overclocking compared with just inserting STEPCs into several speed-paths.

    Original languageEnglish
    Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages300-303
    Number of pages4
    Volume2015-February
    EditionFebruary
    DOIs
    Publication statusPublished - 2015 Feb 5
    Event2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan
    Duration: 2014 Nov 172014 Nov 20

    Other

    Other2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
    CountryJapan
    CityIshigaki Island, Okinawa
    Period14/11/1714/11/20

    Fingerprint

    Monitoring
    Networks (circuits)
    Timing circuits
    Error correction

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Yoshida, S., Shi, Y., Yanagisawa, M., & Togawa, N. (2015). An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (February ed., Vol. 2015-February, pp. 300-303). [7032779] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2014.7032779

    An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. / Yoshida, Shinnosuke; Shi, Youhua; Yanagisawa, Masao; Togawa, Nozomu.

    IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. Vol. 2015-February February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. p. 300-303 7032779.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Yoshida, S, Shi, Y, Yanagisawa, M & Togawa, N 2015, An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. February edn, vol. 2015-February, 7032779, Institute of Electrical and Electronics Engineers Inc., pp. 300-303, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki Island, Okinawa, Japan, 14/11/17. https://doi.org/10.1109/APCCAS.2014.7032779
    Yoshida S, Shi Y, Yanagisawa M, Togawa N. An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. February ed. Vol. 2015-February. Institute of Electrical and Electronics Engineers Inc. 2015. p. 300-303. 7032779 https://doi.org/10.1109/APCCAS.2014.7032779
    Yoshida, Shinnosuke ; Shi, Youhua ; Yanagisawa, Masao ; Togawa, Nozomu. / An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. Vol. 2015-February February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 300-303
    @inproceedings{dbc2a7bd65304f33bf3c7ba938cb4172,
    title = "An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction",
    abstract = "As process technologies advance, the importance of timing error correction techniques is increasing as well. In this paper, We propose an area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction circuits (STEPCs). STEPC predicts timing errors by monitoring the middle points of several speed-paths in a circuit. However, we need many STEPCs with a high area overhead to predict timing errors in an overall circuit. Our proposed method moves the STEPC insertion positions to minimize the number of inserted STEPCs. We apply a max-flow and min-cut approach to determine the optimal positions of inserted STEPCs. Our proposed algorithm reduces the required number of STEPCs to 1/19 and their area to 1/5 compared with a naive algorithm. Furthermore, our algorithm realizes 2.25X overclocking compared with just inserting STEPCs into several speed-paths.",
    author = "Shinnosuke Yoshida and Youhua Shi and Masao Yanagisawa and Nozomu Togawa",
    year = "2015",
    month = "2",
    day = "5",
    doi = "10.1109/APCCAS.2014.7032779",
    language = "English",
    volume = "2015-February",
    pages = "300--303",
    booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    edition = "February",

    }

    TY - GEN

    T1 - An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction

    AU - Yoshida, Shinnosuke

    AU - Shi, Youhua

    AU - Yanagisawa, Masao

    AU - Togawa, Nozomu

    PY - 2015/2/5

    Y1 - 2015/2/5

    N2 - As process technologies advance, the importance of timing error correction techniques is increasing as well. In this paper, We propose an area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction circuits (STEPCs). STEPC predicts timing errors by monitoring the middle points of several speed-paths in a circuit. However, we need many STEPCs with a high area overhead to predict timing errors in an overall circuit. Our proposed method moves the STEPC insertion positions to minimize the number of inserted STEPCs. We apply a max-flow and min-cut approach to determine the optimal positions of inserted STEPCs. Our proposed algorithm reduces the required number of STEPCs to 1/19 and their area to 1/5 compared with a naive algorithm. Furthermore, our algorithm realizes 2.25X overclocking compared with just inserting STEPCs into several speed-paths.

    AB - As process technologies advance, the importance of timing error correction techniques is increasing as well. In this paper, We propose an area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction circuits (STEPCs). STEPC predicts timing errors by monitoring the middle points of several speed-paths in a circuit. However, we need many STEPCs with a high area overhead to predict timing errors in an overall circuit. Our proposed method moves the STEPC insertion positions to minimize the number of inserted STEPCs. We apply a max-flow and min-cut approach to determine the optimal positions of inserted STEPCs. Our proposed algorithm reduces the required number of STEPCs to 1/19 and their area to 1/5 compared with a naive algorithm. Furthermore, our algorithm realizes 2.25X overclocking compared with just inserting STEPCs into several speed-paths.

    UR - http://www.scopus.com/inward/record.url?scp=84937926598&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=84937926598&partnerID=8YFLogxK

    U2 - 10.1109/APCCAS.2014.7032779

    DO - 10.1109/APCCAS.2014.7032779

    M3 - Conference contribution

    AN - SCOPUS:84937926598

    VL - 2015-February

    SP - 300

    EP - 303

    BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

    PB - Institute of Electrical and Electronics Engineers Inc.

    ER -