Abstract
Nowdays, Low-power design, especially Multi-voltage design becomes a popular and efficient way to reduce both dynamic power and static power. In this paper, we propose an efficient method of level-shifter floorplanning for a given multi-voltage design. This method is a two stage optimization method. First, for a given voltage island and its sequence pair representation, we greedily pre-place level-shifters into white-spaces of multi-voltage island based sequence-pair representation. Then, we employ a modified IARFP [1] algorithm to re-optimize the positions of level-shifters. Experimental results show that, the proposed two stage level-shifter floorplanner is efficient for post multi-voltage island optimization.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of International Conference on ASIC |
| Pages | 421-424 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - 2011 |
| Event | 2011 IEEE 9th International Conference on ASIC, ASICON 2011 - Xiamen Duration: 2011 Oct 25 → 2011 Oct 28 |
Other
| Other | 2011 IEEE 9th International Conference on ASIC, ASICON 2011 |
|---|---|
| City | Xiamen |
| Period | 11/10/25 → 11/10/28 |
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Keywords
- Level-Shifter
- Multi-voltage design
- Voltage-Island
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
An effecient level-shifter floorplanning method for multi-voltage design. / Zhang, Xiaolin; Lin, Zhi; Chen, Song; Yoshimura, Takeshi.
Proceedings of International Conference on ASIC. 2011. p. 421-424 6157211.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - An effecient level-shifter floorplanning method for multi-voltage design
AU - Zhang, Xiaolin
AU - Lin, Zhi
AU - Chen, Song
AU - Yoshimura, Takeshi
PY - 2011
Y1 - 2011
N2 - Nowdays, Low-power design, especially Multi-voltage design becomes a popular and efficient way to reduce both dynamic power and static power. In this paper, we propose an efficient method of level-shifter floorplanning for a given multi-voltage design. This method is a two stage optimization method. First, for a given voltage island and its sequence pair representation, we greedily pre-place level-shifters into white-spaces of multi-voltage island based sequence-pair representation. Then, we employ a modified IARFP [1] algorithm to re-optimize the positions of level-shifters. Experimental results show that, the proposed two stage level-shifter floorplanner is efficient for post multi-voltage island optimization.
AB - Nowdays, Low-power design, especially Multi-voltage design becomes a popular and efficient way to reduce both dynamic power and static power. In this paper, we propose an efficient method of level-shifter floorplanning for a given multi-voltage design. This method is a two stage optimization method. First, for a given voltage island and its sequence pair representation, we greedily pre-place level-shifters into white-spaces of multi-voltage island based sequence-pair representation. Then, we employ a modified IARFP [1] algorithm to re-optimize the positions of level-shifters. Experimental results show that, the proposed two stage level-shifter floorplanner is efficient for post multi-voltage island optimization.
KW - Level-Shifter
KW - Multi-voltage design
KW - Voltage-Island
UR - http://www.scopus.com/inward/record.url?scp=84860870583&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84860870583&partnerID=8YFLogxK
U2 - 10.1109/ASICON.2011.6157211
DO - 10.1109/ASICON.2011.6157211
M3 - Conference contribution
AN - SCOPUS:84860870583
SN - 9781612841908
SP - 421
EP - 424
BT - Proceedings of International Conference on ASIC
ER -