An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding

Yichao Lu, Nanfan Qiu, Zhixiang Chen, Satoshi Goto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages479-482
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung
Duration: 2012 Dec 22012 Dec 5

Other

Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
CityKaohsiung
Period12/12/212/12/5

Fingerprint

Majority logic
Message passing
Decoding
Computational complexity

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Lu, Y., Qiu, N., Chen, Z., & Goto, S. (2012). An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 479-482). [6419076] https://doi.org/10.1109/APCCAS.2012.6419076

An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding. / Lu, Yichao; Qiu, Nanfan; Chen, Zhixiang; Goto, Satoshi.

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 479-482 6419076.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lu, Y, Qiu, N, Chen, Z & Goto, S 2012, An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 6419076, pp. 479-482, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, 12/12/2. https://doi.org/10.1109/APCCAS.2012.6419076
Lu Y, Qiu N, Chen Z, Goto S. An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 479-482. 6419076 https://doi.org/10.1109/APCCAS.2012.6419076
Lu, Yichao ; Qiu, Nanfan ; Chen, Zhixiang ; Goto, Satoshi. / An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. pp. 479-482
@inproceedings{43dbd7bbdf9c468d96f737d7c18e5a38,
title = "An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding",
abstract = "This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.",
author = "Yichao Lu and Nanfan Qiu and Zhixiang Chen and Satoshi Goto",
year = "2012",
doi = "10.1109/APCCAS.2012.6419076",
language = "English",
isbn = "9781457717291",
pages = "479--482",
booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",

}

TY - GEN

T1 - An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding

AU - Lu, Yichao

AU - Qiu, Nanfan

AU - Chen, Zhixiang

AU - Goto, Satoshi

PY - 2012

Y1 - 2012

N2 - This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

AB - This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

UR - http://www.scopus.com/inward/record.url?scp=84874147235&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874147235&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2012.6419076

DO - 10.1109/APCCAS.2012.6419076

M3 - Conference contribution

SN - 9781457717291

SP - 479

EP - 482

BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

ER -