An impact of process variation on supply voltage dependence of logic path delay variation

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.

Original languageEnglish
Title of host publication2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479962754
DOIs
Publication statusPublished - 2015 May 28
Externally publishedYes
Event2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 - Hsinchu, Taiwan, Province of China
Duration: 2015 Apr 272015 Apr 29

Publication series

Name2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015

Conference

Conference2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
Country/TerritoryTaiwan, Province of China
CityHsinchu
Period15/4/2715/4/29

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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