An innovative invert charge recovery logic structure

Nan Wang; Yimeng Zhang; Tsutomu Yoshihara

doi:10.1109/ICEDSA.2011.5959068

An innovative invert charge recovery logic structure

Nan Wang^*, Yimeng Zhang, Tsutomu Yoshihara

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we propose a new energy saving boost logic structure named Invert Boost Logic(IBL). This design belongs to the Boost Logic family and inherits the same two-phase structure. Transistor numbers, layout area and power consumption reduce significantly by virtue of this novel design. Driven by two opposite phased power clocks, it can maximize its gate drivability by increasing the logic power supply voltage thanks to the recycling ability of the AC energy sources as well as two latches. Energy cut could be as high as 60% at GHz-Class frequencies.

Original language	English
Title of host publication	International Conference on Electronic Devices, Systems, and Applications
Pages	25-28
Number of pages	4
DOIs	https://doi.org/10.1109/ICEDSA.2011.5959068
Publication status	Published - 2011
Event	2011 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2011 - Kuala Lumpur Duration: 2011 Apr 25 → 2011 Apr 27

Other

Other	2011 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2011
City	Kuala Lumpur
Period	11/4/25 → 11/4/27

Keywords

AC power supply
Boost logic
Charge recovery
Counter

ASJC Scopus subject areas

Computer Science Applications
Hardware and Architecture
Software
Electrical and Electronic Engineering

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10.1109/ICEDSA.2011.5959068

Cite this

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title = "An innovative invert charge recovery logic structure",

abstract = "In this paper, we propose a new energy saving boost logic structure named Invert Boost Logic(IBL). This design belongs to the Boost Logic family and inherits the same two-phase structure. Transistor numbers, layout area and power consumption reduce significantly by virtue of this novel design. Driven by two opposite phased power clocks, it can maximize its gate drivability by increasing the logic power supply voltage thanks to the recycling ability of the AC energy sources as well as two latches. Energy cut could be as high as 60% at GHz-Class frequencies.",

keywords = "AC power supply, Boost logic, Charge recovery, Counter",

author = "Nan Wang and Yimeng Zhang and Tsutomu Yoshihara",

year = "2011",

doi = "10.1109/ICEDSA.2011.5959068",

language = "English",

isbn = "9781612843896",

pages = "25--28",

booktitle = "International Conference on Electronic Devices, Systems, and Applications",

note = "2011 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2011 ; Conference date: 25-04-2011 Through 27-04-2011",

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AU - Wang, Nan

AU - Zhang, Yimeng

AU - Yoshihara, Tsutomu

PY - 2011

Y1 - 2011

N2 - In this paper, we propose a new energy saving boost logic structure named Invert Boost Logic(IBL). This design belongs to the Boost Logic family and inherits the same two-phase structure. Transistor numbers, layout area and power consumption reduce significantly by virtue of this novel design. Driven by two opposite phased power clocks, it can maximize its gate drivability by increasing the logic power supply voltage thanks to the recycling ability of the AC energy sources as well as two latches. Energy cut could be as high as 60% at GHz-Class frequencies.

AB - In this paper, we propose a new energy saving boost logic structure named Invert Boost Logic(IBL). This design belongs to the Boost Logic family and inherits the same two-phase structure. Transistor numbers, layout area and power consumption reduce significantly by virtue of this novel design. Driven by two opposite phased power clocks, it can maximize its gate drivability by increasing the logic power supply voltage thanks to the recycling ability of the AC energy sources as well as two latches. Energy cut could be as high as 60% at GHz-Class frequencies.

KW - AC power supply

KW - Boost logic

KW - Charge recovery

KW - Counter

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DO - 10.1109/ICEDSA.2011.5959068

M3 - Conference contribution

AN - SCOPUS:80055100473

SN - 9781612843896

SP - 25

EP - 28

BT - International Conference on Electronic Devices, Systems, and Applications

T2 - 2011 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2011

Y2 - 25 April 2011 through 27 April 2011

ER -

An innovative invert charge recovery logic structure

Abstract

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Keywords

ASJC Scopus subject areas

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