An SoC based HW/SW co-design architecture for multi-standard audio decoding

Dajiang Zhou; Peilin Liu; Ji Kong; Yunfei Zhang; Bin He; Ning Deng

doi:10.1109/ASSCC.2007.4425765

An SoC based HW/SW co-design architecture for multi-standard audio decoding

Dajiang Zhou^*, Peilin Liu, Ji Kong, Yunfei Zhang, Bin He, Ning Deng

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

In this paper, we presented an SOC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multistandard decoding process. We designed and implemented an SOC platform to verify the filterbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.

Original language	English
Title of host publication	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Pages	200-203
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2007.4425765
Publication status	Published - 2007
Externally published	Yes
Event	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju Duration: 2007 Nov 12 → 2007 Nov 14

Other

Other	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
City	Jeju
Period	07/11/12 → 07/11/14

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ASSCC.2007.4425765

Cite this

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title = "An SoC based HW/SW co-design architecture for multi-standard audio decoding",

abstract = "In this paper, we presented an SOC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multistandard decoding process. We designed and implemented an SOC platform to verify the filterbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.",

author = "Dajiang Zhou and Peilin Liu and Ji Kong and Yunfei Zhang and Bin He and Ning Deng",

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AU - Liu, Peilin

AU - Kong, Ji

AU - Zhang, Yunfei

AU - He, Bin

AU - Deng, Ning

PY - 2007

Y1 - 2007

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An SoC based HW/SW co-design architecture for multi-standard audio decoding

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