An universal logic-circuit with flip flop circuit based on DG-CNTFET

Yasuyuki Miura, Hiroshi Ninomiya, Manabu Kobayashi, Shigeyoshi Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

In this paper, we propose the method for embedding the latch and the flip flop (FF) circuit to the universal logic circuit of Double Gate Carbon NanoTube Field Effect Transistor (DG-CNTFET) proposed in the previous work. Previously, 2-inputs universal logic circuit by 8 DG-CNTFET was proposed. If the embedding of flip flop to them is possible, the reconfigurable circuit which includes a state such as flip flop can be realized. The result of our research shows that SR-latch and D-latch with 3-inputs/state can be embedded within 2-inputs universal logic circuit. Thus it is shown that a D-FF can be embedded to two 2-inputs universal logic circuit.

Original languageEnglish
Title of host publication2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013
Pages148-152
Number of pages5
DOIs
Publication statusPublished - 2013 Dec 9
Externally publishedYes
Event14th IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, PACRIM 2013 - Vancouver, BC, Canada
Duration: 2013 Aug 272013 Aug 29

Other

Other14th IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, PACRIM 2013
CountryCanada
CityVancouver, BC
Period13/8/2713/8/29

Fingerprint

Carbon nanotube field effect transistors
Flip flop circuits
Logic circuits
Networks (circuits)

Keywords

  • Ambipolar device
  • Binary decision diagram
  • Double gate CNTFET
  • Reconfigarable logic design

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

Cite this

Miura, Y., Ninomiya, H., Kobayashi, M., & Watanabe, S. (2013). An universal logic-circuit with flip flop circuit based on DG-CNTFET. In 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013 (pp. 148-152). [6625465] https://doi.org/10.1109/PACRIM.2013.6625465

An universal logic-circuit with flip flop circuit based on DG-CNTFET. / Miura, Yasuyuki; Ninomiya, Hiroshi; Kobayashi, Manabu; Watanabe, Shigeyoshi.

2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013. 2013. p. 148-152 6625465.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Miura, Y, Ninomiya, H, Kobayashi, M & Watanabe, S 2013, An universal logic-circuit with flip flop circuit based on DG-CNTFET. in 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013., 6625465, pp. 148-152, 14th IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, PACRIM 2013, Vancouver, BC, Canada, 13/8/27. https://doi.org/10.1109/PACRIM.2013.6625465
Miura Y, Ninomiya H, Kobayashi M, Watanabe S. An universal logic-circuit with flip flop circuit based on DG-CNTFET. In 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013. 2013. p. 148-152. 6625465 https://doi.org/10.1109/PACRIM.2013.6625465
Miura, Yasuyuki ; Ninomiya, Hiroshi ; Kobayashi, Manabu ; Watanabe, Shigeyoshi. / An universal logic-circuit with flip flop circuit based on DG-CNTFET. 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013. 2013. pp. 148-152
@inproceedings{c33e8e65e197455a9c267fbf301c9de0,
title = "An universal logic-circuit with flip flop circuit based on DG-CNTFET",
abstract = "In this paper, we propose the method for embedding the latch and the flip flop (FF) circuit to the universal logic circuit of Double Gate Carbon NanoTube Field Effect Transistor (DG-CNTFET) proposed in the previous work. Previously, 2-inputs universal logic circuit by 8 DG-CNTFET was proposed. If the embedding of flip flop to them is possible, the reconfigurable circuit which includes a state such as flip flop can be realized. The result of our research shows that SR-latch and D-latch with 3-inputs/state can be embedded within 2-inputs universal logic circuit. Thus it is shown that a D-FF can be embedded to two 2-inputs universal logic circuit.",
keywords = "Ambipolar device, Binary decision diagram, Double gate CNTFET, Reconfigarable logic design",
author = "Yasuyuki Miura and Hiroshi Ninomiya and Manabu Kobayashi and Shigeyoshi Watanabe",
year = "2013",
month = "12",
day = "9",
doi = "10.1109/PACRIM.2013.6625465",
language = "English",
isbn = "9781479915019",
pages = "148--152",
booktitle = "2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013",

}

TY - GEN

T1 - An universal logic-circuit with flip flop circuit based on DG-CNTFET

AU - Miura, Yasuyuki

AU - Ninomiya, Hiroshi

AU - Kobayashi, Manabu

AU - Watanabe, Shigeyoshi

PY - 2013/12/9

Y1 - 2013/12/9

N2 - In this paper, we propose the method for embedding the latch and the flip flop (FF) circuit to the universal logic circuit of Double Gate Carbon NanoTube Field Effect Transistor (DG-CNTFET) proposed in the previous work. Previously, 2-inputs universal logic circuit by 8 DG-CNTFET was proposed. If the embedding of flip flop to them is possible, the reconfigurable circuit which includes a state such as flip flop can be realized. The result of our research shows that SR-latch and D-latch with 3-inputs/state can be embedded within 2-inputs universal logic circuit. Thus it is shown that a D-FF can be embedded to two 2-inputs universal logic circuit.

AB - In this paper, we propose the method for embedding the latch and the flip flop (FF) circuit to the universal logic circuit of Double Gate Carbon NanoTube Field Effect Transistor (DG-CNTFET) proposed in the previous work. Previously, 2-inputs universal logic circuit by 8 DG-CNTFET was proposed. If the embedding of flip flop to them is possible, the reconfigurable circuit which includes a state such as flip flop can be realized. The result of our research shows that SR-latch and D-latch with 3-inputs/state can be embedded within 2-inputs universal logic circuit. Thus it is shown that a D-FF can be embedded to two 2-inputs universal logic circuit.

KW - Ambipolar device

KW - Binary decision diagram

KW - Double gate CNTFET

KW - Reconfigarable logic design

UR - http://www.scopus.com/inward/record.url?scp=84889038186&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84889038186&partnerID=8YFLogxK

U2 - 10.1109/PACRIM.2013.6625465

DO - 10.1109/PACRIM.2013.6625465

M3 - Conference contribution

AN - SCOPUS:84889038186

SN - 9781479915019

SP - 148

EP - 152

BT - 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013

ER -