Analysis of de-embedding error cancellation in cascade circuit design

Kyoya Takano, Ryuichi Fujimoto, Kosuke Katayama, Mizuki Motoyoshi, Minoru Fujishima

Research output: Contribution to journalArticle

Abstract

Accurate device models are very important for the design of high-frequency circuits. One of the factors degrading the accuracy of device models appears during the de-embedding procedure. Generally, to obtain device characteristics without parasitic elements such as pads, a deembedding procedure is essential. However, some errors are introduced during this procedure, which degrades the accuracy of device models. In this paper, we demonstrate that such errors due to de-embedding are cancelled in cascade circuit design, meaning that cascade circuits can be designed without knowing the actual characteristics of devices. Because it is difficult to know the actual characteristics of devices at a high frequency, the cancellation of the de-embedding error is expected to improve the accuracy of device models at high frequencies. After giving a theoretical treatment of de-embedding error cancellation, we report the results of simulations and measurements performed for verification.

Original languageEnglish
Pages (from-to)1641-1649
Number of pages9
JournalIEICE Transactions on Electronics
VolumeE94-C
Issue number10
DOIs
Publication statusPublished - 2011 Oct

Keywords

  • Cascade circuit
  • De-embedding
  • TRL

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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