Analysis technique for systematic variation over whole shot and wafer at 45 nm process node

Jingo Nakanishi, Hiromi Notani, Yasunobu Nakase, Hirofumi Shinohara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We propose a test structure for systematic variation measurement over the whole shot and wafer area at a 45 nm process node. With this structure, we found that the systematic variation had two kinds of site dependence, one is a wafer scale and the other is a shot scale component. Additionally, the Die-to-Die and Within-Die variations for any chip size are calculated. Then, the systematic variation component has the correlation length more than 16mm. This shows that it is necessary to take into consideration the Within-Die variation according to the Die size.

Original languageEnglish
Title of host publicationASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC
Pages585-588
Number of pages4
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 8th IEEE International Conference on ASIC, ASICON 2009 - Changsha, China
Duration: 2009 Oct 202009 Oct 23

Other

Other2009 8th IEEE International Conference on ASIC, ASICON 2009
CountryChina
CityChangsha
Period09/10/2009/10/23

Keywords

  • Analysis of within-wafer
  • Device variation
  • Test structure for systematic variation measurement
  • Within-die and die-to-die variation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Nakanishi, J., Notani, H., Nakase, Y., & Shinohara, H. (2009). Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. In ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC (pp. 585-588). [5351353] https://doi.org/10.1109/ASICON.2009.5351353

Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. / Nakanishi, Jingo; Notani, Hiromi; Nakase, Yasunobu; Shinohara, Hirofumi.

ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC. 2009. p. 585-588 5351353.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nakanishi, J, Notani, H, Nakase, Y & Shinohara, H 2009, Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. in ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC., 5351353, pp. 585-588, 2009 8th IEEE International Conference on ASIC, ASICON 2009, Changsha, China, 09/10/20. https://doi.org/10.1109/ASICON.2009.5351353
Nakanishi J, Notani H, Nakase Y, Shinohara H. Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. In ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC. 2009. p. 585-588. 5351353 https://doi.org/10.1109/ASICON.2009.5351353
Nakanishi, Jingo ; Notani, Hiromi ; Nakase, Yasunobu ; Shinohara, Hirofumi. / Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC. 2009. pp. 585-588
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