Abstract
We propose a test structure for systematic variation measurement over the whole shot and wafer area at a 45 nm process node. With this structure, we found that the systematic variation had two kinds of site dependence, one is a wafer scale and the other is a shot scale component. Additionally, the Die-to-Die and Within-Die variations for any chip size are calculated. Then, the systematic variation component has the correlation length more than 16mm. This shows that it is necessary to take into consideration the Within-Die variation according to the Die size.
| Original language | English |
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| Title of host publication | ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC |
| Pages | 585-588 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - 2009 Dec 1 |
| Event | 2009 8th IEEE International Conference on ASIC, ASICON 2009 - Changsha, China Duration: 2009 Oct 20 → 2009 Oct 23 |
Publication series
| Name | ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC |
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Other
| Other | 2009 8th IEEE International Conference on ASIC, ASICON 2009 |
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| Country | China |
| City | Changsha |
| Period | 09/10/20 → 09/10/23 |
Keywords
- Analysis of within-wafer
- Device variation
- Test structure for systematic variation measurement
- Within-die and die-to-die variation
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
Nakanishi, J., Notani, H., Nakase, Y., & Shinohara, H. (2009). Analysis technique for systematic variation over whole shot and wafer at 45 nm process node. In ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC (pp. 585-588). [5351353] (ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC). https://doi.org/10.1109/ASICON.2009.5351353