Automatic parallelization, performance predictability and power control for mobile-applications

Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)

    Abstract

    Currently few mobile applications exploit the power- and performance capabilities of multi-core architectures. As the number of cores increases, the challenges become more pressing. We picked three challenges: application parallelization, performance-predictability/portability and power control for mobile devices. We tackled the challenges with our auto-parallelizing compiler and operating system enhancements.

    Original languageEnglish
    Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI
    DOIs
    Publication statusPublished - 2013
    Event16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013 - Yokohama
    Duration: 2013 Apr 172013 Apr 19

    Other

    Other16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013
    CityYokohama
    Period13/4/1713/4/19

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    ASJC Scopus subject areas

    • Hardware and Architecture

    Cite this

    Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K., & Kasahara, H. (2013). Automatic parallelization, performance predictability and power control for mobile-applications. In IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI [6547919] https://doi.org/10.1109/CoolChips.2013.6547919