Automatic parallelization, performance predictability and power control for mobile-applications

Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Currently few mobile applications exploit the power- and performance capabilities of multi-core architectures. As the number of cores increases, the challenges become more pressing. We picked three challenges: application parallelization, performance-predictability/portability and power control for mobile devices. We tackled the challenges with our auto-parallelizing compiler and operating system enhancements.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI
DOIs
Publication statusPublished - 2013 Aug 15
Event16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013 - Yokohama, Japan
Duration: 2013 Apr 172013 Apr 19

Publication series

NameIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI

Conference

Conference16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013
CountryJapan
CityYokohama
Period13/4/1713/4/19

ASJC Scopus subject areas

  • Hardware and Architecture

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