Bipolar transistor with a buried layer formed by high-energy ion implantation for subhalf-micron bipolar-complementary metal oxide semiconductor LSIs

Takashi Kuroi, Youji Kawasaki, Yoshiyuki Ishigaki, Yasushi Kinoshita, Masahide Inuishi, Katsuhiro Tsukamoto, Natsuro Tsubouchi

Research output: Contribution to journalArticle

2 Citations (Scopus)


We investigated a bipolar transistor with a buried layer formed by high-energy ion implantation without the epitaxitial silicon layer growth. We focused mainly on the reduction of junction leakage current related to implantation damages, which could be achieved by rapid thermal annealing. Consequently, the maximum current gain of 155 and the cutoff frequency of 17.3 GHz were achieved with BVCE0 —5.0 V. Moreover, this fabrication process is applicable to the conventional complementary metal oxide semiconductor (CMOS) process with the retrograde twin wells without additional process steps. Therefore, this technique can be very promising for the fabrication of subhalf-micron BiCMOS LSIs.

Original languageEnglish
Pages (from-to)541-545
Number of pages5
JournalJapanese journal of applied physics
Issue number1
Publication statusPublished - 1994 Jan 1



  • Annealing
  • BiCMOS
  • Bipolar transistor
  • High-energy ion implantation
  • Junction leakage current
  • Silicon

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

Cite this