Bit-length optimization method for high-level synthesis based on non-linear programming technique

Nobuhiro Doi, Takashi Horiyama, Masaki Nakanishi, Shinji Kimura

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

High-level synthesis is a novel method to generate a RT-level hardware description automatically from a high-level language such as C, and is used at recent digital circuit design. Floating-point to fixed-point conversion with bit-length optimization is one of the key issues for the area and speed optimization in high-level synthesis. However, the conversion task is a rather tedious work for designers. This paper introduces automatic bit-length optimization method on floating-point to fixed-point conversion for high-level synthesis. The method estimates computational errors statistically, and formalizes an optimization problem as a non-linear problem. The application of NLP technique improves the balancing between computational accuracy and total hardware cost. Various constraints such as unit sharing, maximum bit-length of function units can be modeled easily, too. Experimental result shows that our method is fast compared with typical one, and reduces the hardware area.

Original languageEnglish
Pages (from-to)3427-3434
Number of pages8
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE89-A
Issue number12
DOIs
Publication statusPublished - 2006 Dec

Fingerprint

High-level Synthesis
Nonlinear programming
Nonlinear Programming
Optimization Methods
Hardware
Floating point
Fixed point
Digital Circuits
Unit
Optimization
Circuit Design
Balancing
High level languages
Nonlinear Problem
Digital circuits
Sharing
Computational methods
Optimization Problem
Costs
Experimental Results

Keywords

  • Bit-length optimization
  • HDL
  • High-level synthesis
  • Non-linear programming

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Information Systems

Cite this

Bit-length optimization method for high-level synthesis based on non-linear programming technique. / Doi, Nobuhiro; Horiyama, Takashi; Nakanishi, Masaki; Kimura, Shinji.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No. 12, 12.2006, p. 3427-3434.

Research output: Contribution to journalArticle

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