Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss

Kyoya Takano; Shuhei Amakawa; Kosuke Katayama; Mizuki Motoyoshi; Minoru Fujishima

doi:10.1109/ARFTG79.2012.6291203

Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss

Kyoya Takano^*, Shuhei Amakawa, Kosuke Katayama, Mizuki Motoyoshi, Minoru Fujishima

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

9 Citations (Scopus)

Abstract

A characteristic impedance determination technique that can be used in the CMOS process with a large substrate loss is proposed. Furthermore, it is shown using image parameters that the propagation constant is obtained directly from Thru and Line without determining error networks. The validity of the characteristic impedance obtained by the proposed method is shown using the measurement and EM simulation results. The calibration patterns used for the validation check were fabricated using the 40 nm CMOS process.

Original language	English
Title of host publication	79th ARFTG Microwave Measurement Conference
Subtitle of host publication	Non-Linear Measurement Systems, ARFTG 2012
DOIs	https://doi.org/10.1109/ARFTG79.2012.6291203
Publication status	Published - 2012 Oct 29
Externally published	Yes
Event	79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012 - Montreal, QC, Canada Duration: 2012 Jun 22 → 2012 Jun 22

Publication series

Name	79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012

Other

Other	79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012
Country/Territory	Canada
City	Montreal, QC
Period	12/6/22 → 12/6/22

Keywords

CMOS
characteristic impedance
distributed constant circuit model
on-wafer measurement
transmission line

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ARFTG79.2012.6291203

Cite this

Takano, K., Amakawa, S., Katayama, K., Motoyoshi, M., & Fujishima, M. (2012). Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss. In 79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012 [6291203] (79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012). https://doi.org/10.1109/ARFTG79.2012.6291203

Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss. / Takano, Kyoya; Amakawa, Shuhei; Katayama, Kosuke et al.

79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012. 2012. 6291203 (79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Takano, K, Amakawa, S, Katayama, K, Motoyoshi, M & Fujishima, M 2012, Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss. in 79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012., 6291203, 79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012, 79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012, Montreal, QC, Canada, 12/6/22. https://doi.org/10.1109/ARFTG79.2012.6291203

Takano K, Amakawa S, Katayama K, Motoyoshi M, Fujishima M. Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss. In 79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012. 2012. 6291203. (79th ARFTG Microwave Measurement Conference: Non-Linear Measurement Systems, ARFTG 2012). https://doi.org/10.1109/ARFTG79.2012.6291203

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abstract = "A characteristic impedance determination technique that can be used in the CMOS process with a large substrate loss is proposed. Furthermore, it is shown using image parameters that the propagation constant is obtained directly from Thru and Line without determining error networks. The validity of the characteristic impedance obtained by the proposed method is shown using the measurement and EM simulation results. The calibration patterns used for the validation check were fabricated using the 40 nm CMOS process.",

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AU - Fujishima, Minoru

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N2 - A characteristic impedance determination technique that can be used in the CMOS process with a large substrate loss is proposed. Furthermore, it is shown using image parameters that the propagation constant is obtained directly from Thru and Line without determining error networks. The validity of the characteristic impedance obtained by the proposed method is shown using the measurement and EM simulation results. The calibration patterns used for the validation check were fabricated using the 40 nm CMOS process.

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Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss

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Keywords

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