Charge sharing clock scheme for high efficiency double charge pump circuit

Mengshu Huang, Leona Okamura, Tsutomu Yoshihara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)

    Abstract

    A charge sharing clock scheme is proposed to feed a 5-stage double charge pump circuit. By reusing the charges in charging or discharging the parasitic capacitance during the pumping process, dynamic power loss is able to be reduced by nearly a half. Under 1V supply, simulation results show a maximum 10% efficiency increase, and the ripple noise is also reduced by a half comparing to the conventional charge pumps.

    Original languageEnglish
    Title of host publicationICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
    Pages248-250
    Number of pages3
    DOIs
    Publication statusPublished - 2010
    Event2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Shanghai
    Duration: 2010 Nov 12010 Nov 4

    Other

    Other2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
    CityShanghai
    Period10/11/110/11/4

    Fingerprint

    Charge pump circuits
    Clocks
    Capacitance
    Pumps

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

    Cite this

    Huang, M., Okamura, L., & Yoshihara, T. (2010). Charge sharing clock scheme for high efficiency double charge pump circuit. In ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings (pp. 248-250). [5667772] https://doi.org/10.1109/ICSICT.2010.5667772

    Charge sharing clock scheme for high efficiency double charge pump circuit. / Huang, Mengshu; Okamura, Leona; Yoshihara, Tsutomu.

    ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. p. 248-250 5667772.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Huang, M, Okamura, L & Yoshihara, T 2010, Charge sharing clock scheme for high efficiency double charge pump circuit. in ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 5667772, pp. 248-250, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 10/11/1. https://doi.org/10.1109/ICSICT.2010.5667772
    Huang M, Okamura L, Yoshihara T. Charge sharing clock scheme for high efficiency double charge pump circuit. In ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. p. 248-250. 5667772 https://doi.org/10.1109/ICSICT.2010.5667772
    Huang, Mengshu ; Okamura, Leona ; Yoshihara, Tsutomu. / Charge sharing clock scheme for high efficiency double charge pump circuit. ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. pp. 248-250
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    abstract = "A charge sharing clock scheme is proposed to feed a 5-stage double charge pump circuit. By reusing the charges in charging or discharging the parasitic capacitance during the pumping process, dynamic power loss is able to be reduced by nearly a half. Under 1V supply, simulation results show a maximum 10{\%} efficiency increase, and the ripple noise is also reduced by a half comparing to the conventional charge pumps.",
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