CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.

YASUJI NAGAYAMA, TSUTOMU YOSHIHARA, TAKAO NAKANO, YOSHIMI GAMOU

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Abstract

THE PAPER DEALS WITH A UNIFIED APPROACH TO FABRICATION, DEVICE AND CIRCUIT TECHNIQUES OF THE LSI DYNAMIC MOS RAM, A MEMORY ELEMENT FOR INFORMATION PROCESSING DEVICES. THE ANALYSISIS PRESENTED OF THE SENSITIVITY OF A DYNAMIC-TYPE SENSE CIRCUIT USING A SINGLE TRANSISTOR IN A MEMORY CELL, INCLUDING THE VOLTAGE READ OUT FROM THE MEMORY CELL AND THE COEFFICIENTM DEFINING ITS OPERATING REGION TO CLARIFY DESIGN GUIDELINES AND THE CONDITION FOR STABLE OPERATION OF A LARGE-SCALE RAM SENSE CIRCUIT.

Original languageEnglish
Pages (from-to)82-90
Number of pages9
JournalElectron Commun Jpn
VolumeV 64
Issue numberN 2
Publication statusPublished - 1981 Feb
Externally publishedYes

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

NAGAYAMA, YASUJI., YOSHIHARA, TSUTOMU., NAKANO, TAKAO., & GAMOU, YOSHIMI. (1981). CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS. Electron Commun Jpn, V 64(N 2), 82-90.