Circuit design of reconfigurable logic based on double-gate CNTFETs

Manabu Kobayashi, Hiroshi Ninomiya, Shigeyoshi Watanabe

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.

Original languageEnglish
Pages (from-to)1642-1644
Number of pages3
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE96-A
Issue number7
DOIs
Publication statusPublished - 2013 Jul
Externally publishedYes

Keywords

  • Ambipolar double-gate devices
  • CNTFETs
  • Dynamic logic
  • Reconfigurable logic circuit

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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