Circuit design of reconfigurable logic based on double-gate CNTFETs

Manabu Kobayashi, Hiroshi Ninomiya, Shigeyoshi Watanabe

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.

Original languageEnglish
Pages (from-to)1642-1644
Number of pages3
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE96-A
Issue number7
DOIs
Publication statusPublished - 2013 Jan 1
Externally publishedYes

Fingerprint

Circuit Design
Dynamic Logic
Logic circuits
Logic
Networks (circuits)
Transistors
XNOR
Field effect transistors
Nanotubes
Carbon nanotubes
Carbon

Keywords

  • Ambipolar double-gate devices
  • CNTFETs
  • Dynamic logic
  • Reconfigurable logic circuit

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

Cite this

Circuit design of reconfigurable logic based on double-gate CNTFETs. / Kobayashi, Manabu; Ninomiya, Hiroshi; Watanabe, Shigeyoshi.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E96-A, No. 7, 01.01.2013, p. 1642-1644.

Research output: Contribution to journalArticle

@article{e9f9d142160d4d848043b63c9ec116de,
title = "Circuit design of reconfigurable logic based on double-gate CNTFETs",
abstract = "I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.",
keywords = "Ambipolar double-gate devices, CNTFETs, Dynamic logic, Reconfigurable logic circuit",
author = "Manabu Kobayashi and Hiroshi Ninomiya and Shigeyoshi Watanabe",
year = "2013",
month = "1",
day = "1",
doi = "10.1587/transfun.E96.A.1642",
language = "English",
volume = "E96-A",
pages = "1642--1644",
journal = "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",
issn = "0916-8508",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "7",

}

TY - JOUR

T1 - Circuit design of reconfigurable logic based on double-gate CNTFETs

AU - Kobayashi, Manabu

AU - Ninomiya, Hiroshi

AU - Watanabe, Shigeyoshi

PY - 2013/1/1

Y1 - 2013/1/1

N2 - I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.

AB - I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.

KW - Ambipolar double-gate devices

KW - CNTFETs

KW - Dynamic logic

KW - Reconfigurable logic circuit

UR - http://www.scopus.com/inward/record.url?scp=84880523342&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84880523342&partnerID=8YFLogxK

U2 - 10.1587/transfun.E96.A.1642

DO - 10.1587/transfun.E96.A.1642

M3 - Article

AN - SCOPUS:84880523342

VL - E96-A

SP - 1642

EP - 1644

JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

SN - 0916-8508

IS - 7

ER -