Compact 160-GHz amplifier with 15-dB peak gain and 41-GHz 3-dB bandwidth

S. Hara, K. Katayama, K. Takano, I. Watanabe, N. Sekine, A. Kasamatsu, T. Yoshida, S. Amakawa, M. Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

This paper presents a compact wideband amplifier at 160 GHz in 40-nm CMOS. Typical wideband amplifier design requires higher-order matching networks and more gain stages, both of which demand larger die area. The presented 8-stage amplifier uses a compact 'fishbone' layout technique, and its core size is as small as 190 × 123 μm2. A small-signal gain of 15 dB at 160 GHz and a 3-dB bandwidth of 41 GHz are achieved. It consumes 117 mW from a 0.9 V voltage supply.

Original languageEnglish
Title of host publicationProceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
EditorsDomine Leenaerts
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages7-10
Number of pages4
ISBN (Electronic)9781479976416
DOIs
Publication statusPublished - 2015 Nov 25
Externally publishedYes
EventIEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 - Phoenix, United States
Duration: 2015 May 172015 May 19

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume2015-November
ISSN (Print)1529-2517

Other

OtherIEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
Country/TerritoryUnited States
CityPhoenix
Period15/5/1715/5/19

Keywords

  • CMOS process
  • Frequency estimation
  • Millimeter wave circuits
  • amplifiers

ASJC Scopus subject areas

  • Engineering(all)

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