COMPACTION-BASED CUSTOM LSI LAYOUT DESIGN METHOD.

Masaki Ishikawa, Tsuneo Matsuda, Takeshi Yoshimura, Satoshi Goto

Research output: Contribution to journalArticle

Abstract

A design method for custom LSI layouts is presented. This method is based on layout compaction with automatic jog (wiring bend) generation in the layout. A dense chip design can be realized by this technique. Experimental results show that the chip size designed by using the proposed layout method is only 1. 2-1. 4 times larger than that resulting from manual layouts. It is concluded that this compaction-based custom LSI layout design method is very effective for achieving a minimal chip layout design.

Original languageEnglish
Pages (from-to)374-382
Number of pages9
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VolumeCAD-6
Issue number3
Publication statusPublished - 1987 May
Externally publishedYes

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Compaction
Electric wiring

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Computer Science Applications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

COMPACTION-BASED CUSTOM LSI LAYOUT DESIGN METHOD. / Ishikawa, Masaki; Matsuda, Tsuneo; Yoshimura, Takeshi; Goto, Satoshi.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. CAD-6, No. 3, 05.1987, p. 374-382.

Research output: Contribution to journalArticle

Ishikawa, M, Matsuda, T, Yoshimura, T & Goto, S 1987, 'COMPACTION-BASED CUSTOM LSI LAYOUT DESIGN METHOD.', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-6, no. 3, pp. 374-382.
Ishikawa, Masaki ; Matsuda, Tsuneo ; Yoshimura, Takeshi ; Goto, Satoshi. / COMPACTION-BASED CUSTOM LSI LAYOUT DESIGN METHOD. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 1987 ; Vol. CAD-6, No. 3. pp. 374-382.
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