Comparative analysis of on-chip transmission line de-embedding techniques

S. Amakawa; Kosuke Katayama; K. Takano; T. Yoshida; M. Fujishima

doi:10.1109/RFIT.2015.7377897

Comparative analysis of on-chip transmission line de-embedding techniques

S. Amakawa, Kosuke Katayama, K. Takano, T. Yoshida, M. Fujishima

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

Formal comparative analysis is presented of three known de-embedding and characteristic impedance estimation techniques for on-chip transmission lines, used after probe-tip calibration. Somewhat counterintuitively, experience accumulated in the field seems to suggest that the apparently most simplistic of the three gives much better results than the other two, more "accurate-looking" techniques. The reason, however, never seems to have been explained clearly. This paper attempts to explain why and suggests some new alternative techniques.

Original language	English
Title of host publication	2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	91-93
Number of pages	3
ISBN (Electronic)	9781467377942
DOIs	https://doi.org/10.1109/RFIT.2015.7377897
Publication status	Published - 2016 Jan 8
Externally published	Yes
Event	IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Sendai, Japan Duration: 2015 Aug 26 → 2015 Aug 28

Other

Other	IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015
Country	Japan
City	Sendai
Period	15/8/26 → 15/8/28

ASJC Scopus subject areas

Computer Networks and Communications
Electrical and Electronic Engineering

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10.1109/RFIT.2015.7377897

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Amakawa, S., Katayama, K., Takano, K., Yoshida, T., & Fujishima, M. (2016). Comparative analysis of on-chip transmission line de-embedding techniques. In 2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings (pp. 91-93). [7377897] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIT.2015.7377897

Comparative analysis of on-chip transmission line de-embedding techniques. / Amakawa, S.; Katayama, Kosuke; Takano, K.; Yoshida, T.; Fujishima, M.

2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. p. 91-93 7377897.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Amakawa, S, Katayama, K, Takano, K, Yoshida, T & Fujishima, M 2016, Comparative analysis of on-chip transmission line de-embedding techniques. in 2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings., 7377897, Institute of Electrical and Electronics Engineers Inc., pp. 91-93, IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015, Sendai, Japan, 15/8/26. https://doi.org/10.1109/RFIT.2015.7377897

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AB - Formal comparative analysis is presented of three known de-embedding and characteristic impedance estimation techniques for on-chip transmission lines, used after probe-tip calibration. Somewhat counterintuitively, experience accumulated in the field seems to suggest that the apparently most simplistic of the three gives much better results than the other two, more "accurate-looking" techniques. The reason, however, never seems to have been explained clearly. This paper attempts to explain why and suggests some new alternative techniques.

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Comparative analysis of on-chip transmission line de-embedding techniques

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