Comparative analysis of on-chip transmission line de-embedding techniques

S. Amakawa, Kosuke Katayama, K. Takano, T. Yoshida, M. Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Formal comparative analysis is presented of three known de-embedding and characteristic impedance estimation techniques for on-chip transmission lines, used after probe-tip calibration. Somewhat counterintuitively, experience accumulated in the field seems to suggest that the apparently most simplistic of the three gives much better results than the other two, more "accurate-looking" techniques. The reason, however, never seems to have been explained clearly. This paper attempts to explain why and suggests some new alternative techniques.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages91-93
Number of pages3
ISBN (Electronic)9781467377942
DOIs
Publication statusPublished - 2016 Jan 8
Externally publishedYes
EventIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Sendai, Japan
Duration: 2015 Aug 262015 Aug 28

Other

OtherIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015
CountryJapan
CitySendai
Period15/8/2615/8/28

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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  • Cite this

    Amakawa, S., Katayama, K., Takano, K., Yoshida, T., & Fujishima, M. (2016). Comparative analysis of on-chip transmission line de-embedding techniques. In 2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings (pp. 91-93). [7377897] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIT.2015.7377897