Comprehensive approach to MuGFET metrology

G. F. Lorusso, P. Leray, T. Vandeweyer, M. Ercken, C. Delvaux, I. Pollentier, S. Cheng, N. Collaert, R. Rooyackers, B. Degroote, M. Jurczak, S. Biesemans, O. Richard, H. Bender, A. Azordegan, J. McCormack, S. Shirke, J. Prochazka, Timothy Edward Long

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.

Original languageEnglish
Title of host publicationMetrology, Inspection, and Process Control for Microlithography XX
Volume6152 I
DOIs
Publication statusPublished - 2006 Jul 10
Externally publishedYes
EventMetrology, Inspection, and Process Control for Microlithography XX - San Jose, CA, United States
Duration: 2006 Jan 202006 Jan 23

Other

OtherMetrology, Inspection, and Process Control for Microlithography XX
CountryUnited States
CitySan Jose, CA
Period06/1/2006/1/23

Fingerprint

Gates (transistor)
Field-effect Transistor
Metrology
metrology
field effect transistors
CD-SEM
Linewidth
Roughness
Proximity
proximity
roughness
Surface roughness
Scatterometry
fins
CMOS
Transistors
transistors
Transmission electron microscopy
requirements
transmission electron microscopy

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

Cite this

Lorusso, G. F., Leray, P., Vandeweyer, T., Ercken, M., Delvaux, C., Pollentier, I., ... Long, T. E. (2006). Comprehensive approach to MuGFET metrology. In Metrology, Inspection, and Process Control for Microlithography XX (Vol. 6152 I). [615219] https://doi.org/10.1117/12.656076

Comprehensive approach to MuGFET metrology. / Lorusso, G. F.; Leray, P.; Vandeweyer, T.; Ercken, M.; Delvaux, C.; Pollentier, I.; Cheng, S.; Collaert, N.; Rooyackers, R.; Degroote, B.; Jurczak, M.; Biesemans, S.; Richard, O.; Bender, H.; Azordegan, A.; McCormack, J.; Shirke, S.; Prochazka, J.; Long, Timothy Edward.

Metrology, Inspection, and Process Control for Microlithography XX. Vol. 6152 I 2006. 615219.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lorusso, GF, Leray, P, Vandeweyer, T, Ercken, M, Delvaux, C, Pollentier, I, Cheng, S, Collaert, N, Rooyackers, R, Degroote, B, Jurczak, M, Biesemans, S, Richard, O, Bender, H, Azordegan, A, McCormack, J, Shirke, S, Prochazka, J & Long, TE 2006, Comprehensive approach to MuGFET metrology. in Metrology, Inspection, and Process Control for Microlithography XX. vol. 6152 I, 615219, Metrology, Inspection, and Process Control for Microlithography XX, San Jose, CA, United States, 06/1/20. https://doi.org/10.1117/12.656076
Lorusso GF, Leray P, Vandeweyer T, Ercken M, Delvaux C, Pollentier I et al. Comprehensive approach to MuGFET metrology. In Metrology, Inspection, and Process Control for Microlithography XX. Vol. 6152 I. 2006. 615219 https://doi.org/10.1117/12.656076
Lorusso, G. F. ; Leray, P. ; Vandeweyer, T. ; Ercken, M. ; Delvaux, C. ; Pollentier, I. ; Cheng, S. ; Collaert, N. ; Rooyackers, R. ; Degroote, B. ; Jurczak, M. ; Biesemans, S. ; Richard, O. ; Bender, H. ; Azordegan, A. ; McCormack, J. ; Shirke, S. ; Prochazka, J. ; Long, Timothy Edward. / Comprehensive approach to MuGFET metrology. Metrology, Inspection, and Process Control for Microlithography XX. Vol. 6152 I 2006.
@inproceedings{8792124237db43518bea017b818a2038,
title = "Comprehensive approach to MuGFET metrology",
abstract = "As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.",
author = "Lorusso, {G. F.} and P. Leray and T. Vandeweyer and M. Ercken and C. Delvaux and I. Pollentier and S. Cheng and N. Collaert and R. Rooyackers and B. Degroote and M. Jurczak and S. Biesemans and O. Richard and H. Bender and A. Azordegan and J. McCormack and S. Shirke and J. Prochazka and Long, {Timothy Edward}",
year = "2006",
month = "7",
day = "10",
doi = "10.1117/12.656076",
language = "English",
isbn = "0819461954",
volume = "6152 I",
booktitle = "Metrology, Inspection, and Process Control for Microlithography XX",

}

TY - GEN

T1 - Comprehensive approach to MuGFET metrology

AU - Lorusso, G. F.

AU - Leray, P.

AU - Vandeweyer, T.

AU - Ercken, M.

AU - Delvaux, C.

AU - Pollentier, I.

AU - Cheng, S.

AU - Collaert, N.

AU - Rooyackers, R.

AU - Degroote, B.

AU - Jurczak, M.

AU - Biesemans, S.

AU - Richard, O.

AU - Bender, H.

AU - Azordegan, A.

AU - McCormack, J.

AU - Shirke, S.

AU - Prochazka, J.

AU - Long, Timothy Edward

PY - 2006/7/10

Y1 - 2006/7/10

N2 - As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.

AB - As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.

UR - http://www.scopus.com/inward/record.url?scp=33745585303&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33745585303&partnerID=8YFLogxK

U2 - 10.1117/12.656076

DO - 10.1117/12.656076

M3 - Conference contribution

SN - 0819461954

SN - 9780819461957

VL - 6152 I

BT - Metrology, Inspection, and Process Control for Microlithography XX

ER -