Compressor tree based processing element optimization in propagate partial SAD architecture

Yiqing Huang, Liu Qin, Takeshi Ikenaga

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In H.264/AVC standard, the improvement of motion estimation (ME) part helps to enhance the performance greatly. However, the ME part, especially the integer motion estimation (IME) occupies computation complexity dramatically, which leads to complexity in hardware implementation. Many works have been done to achieve efficient IME engine and propagate partial SAD (PPSAD) architecture is the most efficient one in data path and hardware cost. Based on PPSAD structure, this paper proposes a compressor tree based compact PE array architecture. The 4-2 and 3-2 compressor trees are used to build up this compact structure. The proposed structure is embedded into PPSAD architecture and synthesized under different frequency points. With TSMC 0.18μm 1P8M technology, the proposed architecture can achieve 10%-13% hardware cost reduction for asingle4×4 PE array compared with most recent work. About 10.7k, 13.2k and 6.5k gates hardware cost can be saved compared with previous PPSAD structures.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages1786-1789
Number of pages4
DOIs
Publication statusPublished - 2008
EventAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Macao
Duration: 2008 Nov 302008 Dec 3

Other

OtherAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
CityMacao
Period08/11/3008/12/3

Fingerprint

Motion estimation
Compressors
Hardware
Processing
Cost reduction
Costs
Engines

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Huang, Y., Qin, L., & Ikenaga, T. (2008). Compressor tree based processing element optimization in propagate partial SAD architecture. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 1786-1789). [4746388] https://doi.org/10.1109/APCCAS.2008.4746388

Compressor tree based processing element optimization in propagate partial SAD architecture. / Huang, Yiqing; Qin, Liu; Ikenaga, Takeshi.

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2008. p. 1786-1789 4746388.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Huang, Y, Qin, L & Ikenaga, T 2008, Compressor tree based processing element optimization in propagate partial SAD architecture. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 4746388, pp. 1786-1789, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems, Macao, 08/11/30. https://doi.org/10.1109/APCCAS.2008.4746388
Huang Y, Qin L, Ikenaga T. Compressor tree based processing element optimization in propagate partial SAD architecture. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2008. p. 1786-1789. 4746388 https://doi.org/10.1109/APCCAS.2008.4746388
Huang, Yiqing ; Qin, Liu ; Ikenaga, Takeshi. / Compressor tree based processing element optimization in propagate partial SAD architecture. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2008. pp. 1786-1789
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