Deep submicron device isolation with buried insulator between source/drain polysilicon (BIPS)

M. Shimizu, M. Inuishi, T. Ogawa, H. Miyatake, K. Tsukamoto, Y. Akasaka

Research output: Contribution to journalConference article


A novel isolation technology, called buried insulator between source/drain polysilicon (BIPS), is described. The BIPS isolation structure consists of refilling CVD (chemical vapor deposition) oxides in openings between source/drain polysilicon patterns by double photoresist etchback. A defect- and bird's-beak-free process can be realized by this isolation. Devices with BIPS isolation are compared with LOCOS (local oxidation of silicon) with respect to isolation parasitic effects and current drive capability. A 0.5-μm isolation is achieved, and the narrow channel effects are almost supressed with BIPS isolation. The subthreshold characteristics of devices with BIPS isolation give the same shape value as those for conventional devices with LOCOS isolation. A ring oscillator with BIPS isolation exhibits a propagation delay time of 69 ps/gate.

Original languageEnglish
Pages (from-to)96-99
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 1988 Dec 1
EventTechnical Digest - International Electron Devices Meeting 1988 - San Francisco, CA, USA
Duration: 1988 Dec 111988 Dec 14


ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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