Design of CMOS resonating push-push frequency doubler

Hiroshi Adachi, Mizuki Motoyoshi, Kyoya Takano, Kosuke Katayama, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper concerns maximizing the conversion gain of a CMOS push-push doubler, in which the drains of a pair of differentially driven MOSFETs are tied together. We propose to insert transmission lines, which act as resonators at the fundamental frequency, between the drains of the MOSFETs. In the simulation of the proposed circuit, it achieved an output power improvement of 2.2 dB at the 0 dBm input power.

Original languageEnglish
Title of host publicationIMFEDK 2014 - 2014 International Meeting for Future of Electron Devices, Kansai
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479936144
DOIs
Publication statusPublished - 2014 Jul 28
Externally publishedYes
Event12th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2014 - Kyoto, Japan
Duration: 2014 Jun 192014 Jun 20

Other

Other12th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2014
CountryJapan
CityKyoto
Period14/6/1914/6/20

Keywords

  • CMOS
  • frequency multiplier
  • millimeter-wave

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Adachi, H., Motoyoshi, M., Takano, K., Katayama, K., Amakawa, S., Yoshida, T., & Fujishima, M. (2014). Design of CMOS resonating push-push frequency doubler. In IMFEDK 2014 - 2014 International Meeting for Future of Electron Devices, Kansai [6867082] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IMFEDK.2014.6867082