TY - GEN
T1 - Design space exploration of control system with hardware-implemented interrupt handler
AU - Ando, Yuki
AU - Honda, Shinya
AU - Takada, Hiroaki
AU - Edahiro, Masato
PY - 2015/5/20
Y1 - 2015/5/20
N2 - In this paper, we propose a system-level design tool for control systems that enables the development of hardwareimplemented interrupt handler. The increasing complexity of control systems has led to a rise in the frequency of interrupts. As a result, the processor load increases, leading to deterioration in the latency of interrupt processing. To solve these problems, we require dedicated hardware that is activated by an interrupt and can directly access devices during its processing. The proposed method enables control systems with above dedicated hardware to be developed using a model that abstracts an interrupt, interrupt processing, and communication between the control processing and devices. Case studies on a motor control system show that the proposed method enables the designer to explore design space of control system, reduces the processor load and improves the latency of the interrupt processing.
AB - In this paper, we propose a system-level design tool for control systems that enables the development of hardwareimplemented interrupt handler. The increasing complexity of control systems has led to a rise in the frequency of interrupts. As a result, the processor load increases, leading to deterioration in the latency of interrupt processing. To solve these problems, we require dedicated hardware that is activated by an interrupt and can directly access devices during its processing. The proposed method enables control systems with above dedicated hardware to be developed using a model that abstracts an interrupt, interrupt processing, and communication between the control processing and devices. Case studies on a motor control system show that the proposed method enables the designer to explore design space of control system, reduces the processor load and improves the latency of the interrupt processing.
UR - http://www.scopus.com/inward/record.url?scp=84936151000&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84936151000&partnerID=8YFLogxK
U2 - 10.1109/ICTEmSys.2015.7110821
DO - 10.1109/ICTEmSys.2015.7110821
M3 - Conference contribution
AN - SCOPUS:84936151000
T3 - 2015 6th International Conference on Information and Communication Technology for Embedded Systems, IC-ICTES 2015
BT - 2015 6th International Conference on Information and Communication Technology for Embedded Systems, IC-ICTES 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Conference on Information and Communication Technology for Embedded Systems, IC-ICTES 2015
Y2 - 22 March 2015 through 24 March 2015
ER -