Design system for special purpose processor executing algorithms described by higher level language

K. Shirai, T. Ikenaga, H. Kitabatake

Research output: Contribution to conferencePaper

2 Citations (Scopus)

Abstract

In order to satisfy the user's requirements which are described by a high level language, a large number of possibilities must be examined to find a good design. The case in which the architecture is restricted to that having a usual instruction set is considered. The main objective of the system is to generate a minimal set of hardware which can execute the given algorithms and also satisfy other requirements such as speed, hardware cost, and I/O condition. It realizes an integrated system which provides not only a hardware design environment but also a software one by generating automatically a higher-level language compiler which has optimization capability for the processor at the same time. As a practical example, the design of a special-purpose processor which can execute thirteen typical digital signal processing algorithms is demonstrated. It is shown that the design system can provide ASIC users a total environment to design and use special-purpose processors. The software development tools are superior to those usable for general-purpose DSPs.

Original languageEnglish
Pages1.4p
Publication statusPublished - 1990 Dec 1
EventProceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit - Rochester, NY, USA
Duration: 1990 Sep 171990 Sep 21

Other

OtherProceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit
CityRochester, NY, USA
Period90/9/1790/9/21

ASJC Scopus subject areas

  • Engineering(all)

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    Shirai, K., Ikenaga, T., & Kitabatake, H. (1990). Design system for special purpose processor executing algorithms described by higher level language. 1.4p. Paper presented at Proceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit, Rochester, NY, USA, .