Developing a leading practical application for 3D IC chip stacking technology: How to progress from fundamental technology to application technology

Masahiro Aoyagi, Fumito Imura, Fumiki Kato, Katsuya Kikuchi, Naoya Watanabe, Motohiro Suzuki, Hiroshi Nakagawa, Yoshikuni Okada, Tokihiko Yokoshima, Yasuhiro Yamaji, Shunsuke Nemoto, Tung Thanh Bui, Samson Melamed

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

3D IC chip stacking technology, which is a technology to vertically stack multiple IC chips such as CMOS, MEMS and power IC chips, is expected to be one of future electronic device integration technologies, because integration along the additional vertical dimension affords efficient use of space and innovation of system architecture. We developed fundamental technology of high density integration for 3D IC chip stacking. To accelerate industrial applications of this technology, a mass-production process was developed in collaboration with a manufacturing equipment company.

Original languageEnglish
JournalSynthesiology
Volume9
Issue number1
DOIs
Publication statusPublished - 2016 Jun 1

Keywords

  • 3D stacking
  • IC
  • Packaging
  • Semiconductor device
  • TSV

ASJC Scopus subject areas

  • Engineering(all)
  • General

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  • Cite this

    Aoyagi, M., Imura, F., Kato, F., Kikuchi, K., Watanabe, N., Suzuki, M., Nakagawa, H., Okada, Y., Yokoshima, T., Yamaji, Y., Nemoto, S., Bui, T. T., & Melamed, S. (2016). Developing a leading practical application for 3D IC chip stacking technology: How to progress from fundamental technology to application technology. Synthesiology, 9(1). https://doi.org/10.5571/SYNTHENG.9.1_1