Abstract
3D IC chip stacking technology, which is a technology to vertically stack multiple IC chips such as CMOS, MEMS and power IC chips, is expected to be one of future electronic device integration technologies, because integration along the additional vertical dimension affords efficient use of space and innovation of system architecture. We developed fundamental technology of high density integration for 3D IC chip stacking. To accelerate industrial applications of this technology, a mass-production process was developed in collaboration with a manufacturing equipment company.
Original language | English |
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Journal | Synthesiology |
Volume | 9 |
Issue number | 1 |
DOIs | |
Publication status | Published - 2016 Jun 1 |
Keywords
- 3D stacking
- IC
- Packaging
- Semiconductor device
- TSV
ASJC Scopus subject areas
- Engineering(all)
- Social Sciences(all)