Development of lapping and polishing technologies of 4H-SiC wafers for power device applications

Hirokatsu Yashiro, Tatsuo Fujimoto, Noboru Ohtani, Taizo Hoshino, Masakazu Katsuno, Takashi Aigo, Hiroshi Tsuge, Masashi Nakabayashi, Hosei Hirano, Kohei Tatsumi

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

Original languageEnglish
Pages (from-to)819-822
Number of pages4
JournalMaterials Science Forum
Volume600-603
DOIs
Publication statusPublished - 2009
Externally publishedYes

Fingerprint

Lapping
Polishing
polishing
Chemical polishing
wafers
Silicon Dioxide
Silica
flatness
Abrasives
Oxidants
Oxides
Surface properties
Microscopes
silicon dioxide
grit
Single crystals
Fabrication
abrasives
microscopes
damage

Keywords

  • 4H-SiC
  • Atomic force microscopy
  • Auger electron spectroscopy
  • Lapping
  • LTV
  • Mechano-chemical polishing
  • SORI
  • TTV

ASJC Scopus subject areas

  • Materials Science(all)
  • Condensed Matter Physics
  • Mechanical Engineering
  • Mechanics of Materials

Cite this

Development of lapping and polishing technologies of 4H-SiC wafers for power device applications. / Yashiro, Hirokatsu; Fujimoto, Tatsuo; Ohtani, Noboru; Hoshino, Taizo; Katsuno, Masakazu; Aigo, Takashi; Tsuge, Hiroshi; Nakabayashi, Masashi; Hirano, Hosei; Tatsumi, Kohei.

In: Materials Science Forum, Vol. 600-603, 2009, p. 819-822.

Research output: Contribution to journalArticle

Yashiro, H, Fujimoto, T, Ohtani, N, Hoshino, T, Katsuno, M, Aigo, T, Tsuge, H, Nakabayashi, M, Hirano, H & Tatsumi, K 2009, 'Development of lapping and polishing technologies of 4H-SiC wafers for power device applications', Materials Science Forum, vol. 600-603, pp. 819-822. https://doi.org/10.4028/3-908453-11-9.819
Yashiro, Hirokatsu ; Fujimoto, Tatsuo ; Ohtani, Noboru ; Hoshino, Taizo ; Katsuno, Masakazu ; Aigo, Takashi ; Tsuge, Hiroshi ; Nakabayashi, Masashi ; Hirano, Hosei ; Tatsumi, Kohei. / Development of lapping and polishing technologies of 4H-SiC wafers for power device applications. In: Materials Science Forum. 2009 ; Vol. 600-603. pp. 819-822.
@article{77d58da0f68a48fa93263551f8de0425,
title = "Development of lapping and polishing technologies of 4H-SiC wafers for power device applications",
abstract = "The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.",
keywords = "4H-SiC, Atomic force microscopy, Auger electron spectroscopy, Lapping, LTV, Mechano-chemical polishing, SORI, TTV",
author = "Hirokatsu Yashiro and Tatsuo Fujimoto and Noboru Ohtani and Taizo Hoshino and Masakazu Katsuno and Takashi Aigo and Hiroshi Tsuge and Masashi Nakabayashi and Hosei Hirano and Kohei Tatsumi",
year = "2009",
doi = "10.4028/3-908453-11-9.819",
language = "English",
volume = "600-603",
pages = "819--822",
journal = "Materials Science Forum",
issn = "0255-5476",
publisher = "Trans Tech Publications",

}

TY - JOUR

T1 - Development of lapping and polishing technologies of 4H-SiC wafers for power device applications

AU - Yashiro, Hirokatsu

AU - Fujimoto, Tatsuo

AU - Ohtani, Noboru

AU - Hoshino, Taizo

AU - Katsuno, Masakazu

AU - Aigo, Takashi

AU - Tsuge, Hiroshi

AU - Nakabayashi, Masashi

AU - Hirano, Hosei

AU - Tatsumi, Kohei

PY - 2009

Y1 - 2009

N2 - The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

AB - The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 μm, LTV (local thickness variation) of less than 1 μm, and SORI smaller than 10 μm. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H2O2, effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

KW - 4H-SiC

KW - Atomic force microscopy

KW - Auger electron spectroscopy

KW - Lapping

KW - LTV

KW - Mechano-chemical polishing

KW - SORI

KW - TTV

UR - http://www.scopus.com/inward/record.url?scp=63849243259&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=63849243259&partnerID=8YFLogxK

U2 - 10.4028/3-908453-11-9.819

DO - 10.4028/3-908453-11-9.819

M3 - Article

AN - SCOPUS:63849243259

VL - 600-603

SP - 819

EP - 822

JO - Materials Science Forum

JF - Materials Science Forum

SN - 0255-5476

ER -