Development of low-noise front-end asic for hybrid cdte pixel detectors

Goro Sato*, Tetsuichi Kishishita, Hirokazu Ikeda, Takuto Sakumura, Tadayuki Takahashi

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

17 Citations (Scopus)


A front-end ASIC with spectroscopic capability was developed to construct a prototype CdTe pixel detector for future use in focusing hard X-ray telescopes. The ASIC is designed for a hybrid configuration, where each CdTe sensor pixel is vertically connected to a corresponding pixel cell fabricated in the readout ASIC. The readout chip consists of a 12 × 12 matrix of identical 270 × 270μm2 pixel cells, and was implemented with TSMC 0.35μm CMOS technology. The low noise performance achieved an equivalent noise charge distribution of 50 ± 10e-. A CdTe pixel detector was mounted on the ASIC using an In/Au-stud bump-bonding technique. The detector was operated in self-trigger mode, and showed good spectral performance with energy resolution of 870 eV (FWHM) at 59.5 keV.

Original languageEnglish
Article number5756681
Pages (from-to)1370-1375
Number of pages6
JournalIEEE Transactions on Nuclear Science
Issue number3 PART 3
Publication statusPublished - 2011 Jun


  • Analog front-end
  • ASIC
  • CdTe
  • CdZnTe
  • gamma-ray
  • low noise
  • pixel
  • VLSI
  • X-ray

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Nuclear Energy and Engineering
  • Nuclear and High Energy Physics


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