DOUBLE STACKED CAPACITOR WITH SELF-ALIGNED POLY SOURCE/DRAIN TRANSISTOR (DSP) CELL FOR MEGABIT DRAM.

K. Tsukamoto, M. Shimizu, M. Inuishi, Y. Matsuda, H. Oda, H. Morita, M. Nakajima, K. Kobayashi, Y. Mashiko, Y. Akasaka

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5 Citations (Scopus)

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Engineering & Materials Science

Physics & Astronomy